BQ76930: DSG fet burnout and 1V gate drive

Hi Noel, 

Apologies for the delay on getting back to you, support queue is very high at the moment and responses are taking significantly longer than usual. Do you mind linking the post you are mentioning or re-populating the question here for us to take a look. 

Regards, 

Arelis G. Guerrero 

Hi Arelis,

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1500824/bq76930-dsg-fet-burnout-and-1v-gate-drive

This is the previous post that Noel is talking about. I think it would be better if we continue this discussion on the thread linked above, as it has some additional information as well.

Hi Arelis,

Hope you have gotten a chance to review the previous link shared above. I can share you the files for the PCB on private chat if necessary. Please do help us out. The wait has been really really long now.

Regards,
Noel

Hi Noel, 

Thank you for your patience, and apologies again for the long wait. I'm replying here, as the previous post is lock, but we can keep the link above as reference.

Can you please go ahead and share your design files with us, I will like to take a look and make sure the schematic is good. In addition, you mentioned the DSG FETs keep dying, is this happening in all your boards? What's the failure rate? 

Regards, 

Arelis G. Guerrero 

Hi Arelis,

Please check you private chat, i've shared the files with you for you review.

Arelis Guerrero said:

In addition, you mentioned the DSG FETs keep dying, is this happening in all your boards? What's the failure rate? 

Only the DSG fets, yes. Like i've mentioned on the previous thread, it works fine at first, then i lose gate drive and the FETs burn out. I tested almost 6 boards and observed this on all 6. I've attached a scope image on the previous thread for DSG fet Vgs after i lose drive. And i never get them to work again. I tried replacing the BQ76930 on one board and observed the same thing. 

There is no issue with the CHG gate drive and the fets in any case, they are still up and working all good. 

Hoping to hear from you soon.

Thanks and Regards,
Noel Binny Abraham

Hi Noel, 

I'm out of office returning Tuesday June 24. Allow me till then to review and get back to you. Thanks for your patience. 

Regards, 

Arelis G. Guerrero 

Hi Noel, 

I took a look at your schematic today, have not look at the layout. Overall looks good, follow our TI designs very closely. A few questions I have: 

• You mentioned a 6s circuit, but your schematic shows 10s. Where are your cell connected? 
• We don't really have an R112 on our diagrams, and some of your caps are slightly smaller than our reference design. 
• I'm assuming some of your DSG FETs are populated, they are all DNP. Do you have 2 in parallel, matching the CHG configuration? 
• On this repetitive tests you are performing, is the DSG ever going below GND? 
• I'm assuming on your FET selection you make sure the voltage, but also the current and the power dissipation are good? Have you tried another DSG FET?
• You also mentioned no oscillation observed on the FETs. Did you make sure all the abs max voltages are within the specs? It might be good to do a spike check in all key pins VCx, BAT, VCxb, CHG, DSG, CAPx, REGSRC, REGOUT and make sure there's not a violation of the abs max during FET's transients. 

I will take a look at the layout and get back to you if I see anything. 

Regards, 

Arelis G. Guerrero 

Hi Arelis,

1. The cells for the 6S are connected as per the datasheet table. I've used a 11 pin connector and what i did was shorted the wires on the battery end:
Shorted Cell 4 lead to Cell 3, Shorted Cell 8 & 9 leads to Cell 5 for 6S configuration and set the AFE CELL count registed to 6S as well. I was getting all the right readings on my BQStudio.

2. Yes this had given me an issue previously and i had shorted this resistor pad on the boards that i was testing. 

3. Yes the DSG fets was populated, 2 in parallel to mathc CHG configuration. On the schematic it is DNP as i did not want to have it assembled by my EMS. 

4. This is the Vgs of my DSG fet after a few mins of turn on as mentioned on the previous thread (https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1500824/bq76930-dsg-fet-burnout-and-1v-gate-drive)

No it does not go below GND ever.
(Fet VGS scope data after i lose gate drive):
 

This is the turn-on VGS signal for DSG fet when the IC was giving me a good gate drive signal for about a min during turn on (the first time i turn the fet on for every board i tested):


5. Yes i tried using both these fets and the results were same: 
 a) BSC028N06NS
 b) AON6144

6. As far as i 've cheked, none of the voltages ever went above the ABS_MAX rating of any components. If that was the case, then the board should not function even now right? Even after i end up losing the DSG drive from the BQ76930, rest of the functions of the BMS work just fine. I even charged a battery after desoldering the DSG fets from the board. 
I'll check them again for any violations and have an update for you by the time you check the layout. 

Thanks and Regards, 
Noel Binny Abraham

Hi Noel, 

Thank again for your patience. I finally was able to review your layout. Overall good routing and GND. Some minor comments will be to clean up the REGOUT traces, and to see if you can move those capacitors close to your chips ground closer to the BQ chip; VC1, VC0, VC5B and VC5. Given that you are having issue with the 6s configuration, I want to make sure the abs max are not being violated during transients at low voltage. 

Did you got a chance to look at the voltages during these transients for any abs max violation, in particular VC5B, VC5, VC6, VC1, VC0 might be good ones to check? 

Regards, 

Arelis G. Guerrero 

Hi Arelis,

Arelis Guerrero said:

Given that you are having issue with the 6s configuration, I want to make sure the abs max are not being violated during transients at low voltage. 

I also configured it for 7S and 10S as well to check if it was just a problem with the 6S configuration, but as it turns out, im observing the same issue on all configurations. My REGSRC voltage does not go above the recommended 25V in any of these cases (6S,7S and 10S). 

I did check the transients and this time it is configured for 10S

VC5B: 3.39V

VC5: 3.43V

VC6: 3.39V

VC1: 3.51V

VC0: 3.51V

All voltages stable and no transient spike observed while plugin and plugout. (Measured wrt to the previous cell)

REGOUT: 2.522V
RESRC: 15.67V
BATT VOLTAGE: 34.07V

I checked the DSG and CHG voltages again under the following conditions (BQSTUDIO on screen and FET VGS on DMM):

1. FET_EN=0 
    DSGFET=0
    CHGFET=1
CHG FET VGS on DMM
    

2. FET_EN=0
    DSGFET=1
    CHGFET=0
DSG FET VGS on DMM

3. FET_EN=1
    DSGFET=1
    CHFET=1
In this case as seen below, when both the CHG and DSG fets are enabled, the CHGFET_Vgs drops down to around 11.2V.
CHG FET VGS on DMM


Im using the AON6144 fets here on both the DSG and CHG legs and have 2 of each on each leg.

I believe this is all of the data that is relevant and needed to troubleshoot. Do let me know if you need more data on this.

Best Regards,
Noel

Hi Noel, 

I'm more interested on transient test and the negative side of VC5B, VC5, VC6, VC1, VC0 respect to VSS and VC5x. I want to see if any of this signals go below the abs min. Can you re-connect a scope on VC5B, VC5x, VC5 and VC1 and use the 6s configuration and see if there might be a case where the abs max/min is being violated. I think low battery voltage would exaggerate any fails, so if you can try with a 6s configuration, and cell valid but with lower voltages, and re-capture that'll be very good. Keep in mind, on the EVM we don't see this issue, so seems to be very particular to your system, so my best guess is some signal is dying after a few minutes of use and creating additional transients that eventually damage the FET. 

Also, is this using real cells or a battery simulator? 

Regards, 

Arelis G. Guerrero 

Hi Arelis,

I have the scope shots attached here in the folder with the relevant namings.
BQ76930 Scope Data.zip
As suggested, i changed the configuration to a 6S pack (battery voltage at about 20V) and yes we are using actual cells to test this. 

I observed the following when doing this:

The VC5X on the board i was testing was at about 10V initially and on two of my boards, i did get a gate drive of about 7V. Your doubt was right, after a few minutes of turn on (pluggin in the cell connector), the VC5X signal falls down to 0V w.r.t GND and this is when i lose my DSG drive voltage. I checked all of my boards again and on 2 boards this observation is the same and on the other boards, right when i plug in my cell connector i observe 0V on VC5X and i never get gate drive on these boards. 

What might be causing this?

Best Regards,
Noel Binny Abraham

Hi Arelis,

I wanted to follow up as I haven’t heard back in a while. I’ve shared all the requested data and would appreciate it if you could review the information and help move this issue toward resolution.

Keen to understand the root cause of the problem we’re facing. Your insights would be extremely helpful in closing this matter.

Thanks and Regards,
Noel Binny Abraham

Hi Arelis, 

It has been a really long time. Really hoping to get a response from your end.