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UCC27201A: Technical Support Request for UCC27201 – Device Overheating Under Load

Part Number: UCC27201A
Other Parts Discussed in Thread: UCC27201, CSD18563Q5A,

Tool/software:

Dear Texas Instruments Support Team,

I hope this message finds you well.

I am currently using the UCC27201 high-side/low-side driver in a power switching application, supplied with 12V. The driver operates as expected when there is no load or when connected to a high-resistance load. However, I encounter a critical issue when connecting a low-resistance load: the driver begins to heat up significantly and eventually gets damaged.

The MOSFET used in the design is the CSD18563Q5A, and the configuration follows standard recommendations as per the datasheet. I have ensured proper decoupling and layout practices. The issue seems to arise specifically under higher load conditions.

I would like to understand the possible causes of this problem. Could it be related to shoot-through, incorrect dead time, excessive switching losses, or gate driving issues? I would appreciate it if you could help me identify the root cause and suggest any modifications or protections I can implement.

If needed, I can provide schematic diagrams and scope captures of the switching behavior.

Thank you in advance for your assistance.

Best regards,

  • Hi Ahmed,

    Can you clarify if you are using the UCC27201A to drive a MOSFET or a resistive load? Are you switching the load (inputting a PWM signal) or are you doing a DC turn-on and turn-off (switching between DC high or DC low to the input pins)? Does the failure occur during start-up, steady-state, or shut-down?

    If you are driving a MOSFET with a PWM signal, then your VDD, switching frequency, and load will contribute to the power dissipated by the gate driver. You can read about gate driver power dissipation through this FAQ: [FAQ] Maximum Operating Frequency - Power management forum - Power management - TI E2E support forums

    To summarize, gate driver power dissipation revolves around these two equations:
    1. P = VDD * Qg * fsw ; (Qg is found in MOSFET datasheet)

    2. Tj = (P * RθJA) + Ta ; (RθJA is found in gate driver datasheet)

    If the calculated Tj exceeds the rated Tj of the gate driver (found in gate driver datasheet, usually 150C), then the gate driver will fail.

    Along with helping to clarify my first three questions, please send me the schematic and HO, HS, HB, and LO waveform captures.

    Please also read this app note to ensure proper bootstrap design is used in your half-bridge circuit: Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A)

    Thanks,
    Rubas