BQ28Z620: BQ28Z620 Design Capacity and SoC Measurement Issue – FCC Fluctuation and Cycle Count Not Updating

Hey Hasan,

Can you send me the .gg file and the bqstudio log file?

Thanks,

Adam

Hello Adam,

Please find attached the gg. file and the bqstudio log file. Thank you in advance for your feedback and support.

Hasan B.

6371.gg.csv0407.Discharge.log

Hello Hasan,

The Update Status should be able to update from a 4 to a 5. This makes it seem like an improper ChemID was used. How did you match the ChemID? If you used the GPCCHEM Tool, could you send the report?

Thanks,

Adam

Hello Adam,

I did not use the GPCCHEM tool. The cell I used is the INR18650A28 from Aspilsan. Since I couldn’t find it listed in the ChemID section, I selected the ChemID for the Molicel P28A series instead.

Do you think the issue might be related to the ChemID?

Hasan B.

Hi Adam,
I performed the Chem ID matching using the GPCCHEM tool. I also updated the "update status" from 4 to 5, as you previously suggested. However, the issue remains unresolved and the cycle count is still not changing as expected.
Please find attached the Chem ID matching report and the log file.

Thanks, 

5518.ChemId-report.zip5518.ChemId.zipHasan B. 

Hi Hasan,

Could you send me the gg. file and the log file of the most previous run (with the correct ChemID and update status = 5)?

Thanks,

Adam

prototype.gg.csv

Hi Adam, 

Please find the attached .GG file. I would appreciate it if you could share any insights or suggestions regarding the issue I am facing.

Thanks, 

Hasan B.

Hi Hasan

How much is FCC changing by? If you can, send me the bqstudio log file that should contain FCC. Design Capacity is manufacturer's target energy storage for a brand new battery, while full charge capacity is the actual amount of energy the battery can hold at a full charge after aging. This would make sense why you are never reaching design capacity.

Thanks,

Adam

Hi Adam, 

I’m attaching the log file from the latest test I performed using the updated gg.file.

After updating the chemistry ID, the FCC (Full Charge Capacity) behavior has improved based on recent tests. However, the SoC (State of Charge) variation still shows a relatively high error margin. Our expectation is to keep this error within 5% or lower.

Additionally, I’ve observed some inconsistencies with the cycle count. Sometimes it doesn’t change at all, or only occasionally increments. For example, after the most recent test, the cycle count increased, but prior to that, I had performed several full charge–full discharge cycles without any change in the count.

While the FCC behavior appears reasonable, the error in SoC estimation remains concerning.

Could you please check the updated gg.file and let me know if you noticed any discrepancies or potential issue

Thanks, 

Hasan B.

Prototype_Discharge.log

Hi Hasan,

I calculated the SoC estimation errors and see the issue. I will start looking at this right away and get back to you ASAP.

Thanks,

Adam

Hello Adam,

I’m looking forward to your response.

Thank you for your help.

Hasan B.

Hi Hasan,

Error looks like to be tracking with temperature rise. Run a GPCRB for high temp and send those results. Also, change design capacity to 3600 cWh (currently at 360), seems like rounding error. This could help solve your issue.

Thanks,

Adam

Hi Adam,

I’ve gathered the requested data according to the reference document. However, I encountered an error when trying to upload it through the provided link. This might be due to not conducting the tests at cold and room temperatures as required.

I’m looking forward to your feedback. Please note that I might not be in the office next week, so there could be a delay in my response.

Thanks,
Hasan

1145.GPCRB.zip

Hi Hasan

If you could get send me the SREC and log file from the GPCRB. These files will give me a good explanation of what might be going on. Did the correction of the design capacity help your issue?

Thanks,

Adam

Hi Adam,

Please find attached the SREC file and the high-temperature operation log file based on the GPCRB procedure.

Yes, the SoC estimation error has significantly decreased, which is great. However, the issue with capacity fluctuation still persists. After each charge/discharge cycle, the FCC value changes and the device seems to interpret it accordingly.

Additionally, the cycle count still does not update.

Thanks,

Hasan B.

highTemperatureLog.logscrec.zip

Hi Hasan,

FCC value can be changing based on the change of temperature. This could be the reason you are seeing these fluctuations in FCC.

I will look at the screc file for reasons the cycle count is not updating and get back to you. I see the Cycle Count Percentage is set to 85%. Is your CCT bit =1 or 0? This determines if FCC or Design Capacity is used for updating cycle count.

Thanks,

Adam

Hi Adam,

CCT is set to 1, so the cycle count should be updating based on FCC. I set it this way to get a more accurate understanding of the capacity and related values over time.

From your side, do you see any issues or anything unusual that I might have missed?

Thanks,
Hasan

Hi Hasan,

Looking deeper at the log files, FCC is fluctuating because of your temperature. Every time FCC jumps is because the temp gets to 50C or higher. But FCC seems to be following appropriately.

With Cycle Count not updating - I wasn't able to find any reason why the cycle count wasn't updating. A simple and easy fix is for you to keep cycle count yourself. If this is not wanted, I can continue to look into it and try to find the problem. My own guess is that the high temperature might be causing cycle count to not update. A test at only room temp could be ran to see if this is the issue.

Thanks,

Adam

Hi Adam,

Thank you for your feedback and support. For now, I’m manually tracking the cycle count, but once the product moves beyond the prototype stage, we need to identify and permanently resolve the root cause — especially for long-term metrics like battery health.

Since batteries naturally generate heat due to internal resistance, the BMS is also affected by this. I haven't encountered such an issue with other TI BMS families before. That said, SOC values currently remain within acceptable limits.

Regarding the cycle count, I’ve observed that it does not increment during all tests performed at room temperature. If you notice anything unusual in the logs or parameters, or anything that needs to be corrected, I’d appreciate your insights.

Thanks again for your continued support.

Thanks,

Hasan 

Hi Hasan,

I will continue to look through the files you have sent me to find the cycle count problem. I will keep you updated on it as well.

Thanks,

Adam