This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ76942: Cell 8 and 9 on top of battery pack balance much slowly

Part Number: BQ76942
Other Parts Discussed in Thread: BQSTUDIO

Tool/software:

I have a problem with the BQ76942 circuit in an application using 9 battery cells. In this configuration, I have tied VC10 to VC9 as recommended for 9-cell operation.

Currently, I’m using external FETs to increase the balancing current to approximately 100 mA. However, I’ve encountered an issue where cell 8 and cell 9, which are at the top of the balancing circuit, balance much more slowly than the other cells. For example, the other cells are balanced down to the minimum cell voltage within about 30 minutes, but cells 8 and 9 remain almost unchanged during this time.

I have reviewed the TI documentation and found that the device stops balancing when reading the PACK voltage. To test this, I disabled the function BQ769x2_ReadVoltage(PACKPinVoltage); related to reading the PACK voltage. However, the issue persists—cells 8 and 9 still balance very slowly.

Please provide guidance on how to address this issue.

Thank you,
Khanh

  • This is my initial setting for BQ76942

    void BQ769x2_Init() {

    CommandSubcommands(BQ769x2_RESET); // Resets the BQ769x2 registers

    HAL_Delay(60);

    // Configures all parameters in device RAM

    // Enter CONFIGUPDATE mode (Subcommand 0x0090) - It is required to be in CONFIG_UPDATE mode to program the device RAM settings

    // See TRM for full description of CONFIG_UPDATE mode

    CommandSubcommands(SET_CFGUPDATE);

    // After entering CONFIG_UPDATE mode, RAM registers can be programmed. When programming RAM, checksum and length must also be

    // programmed for the change to take effect. All of the RAM registers are described in detail in the BQ769x2 TRM.

    // An easier way to find the descriptions is in the BQStudio Data Memory screen. When you move the mouse over the register name,

    // a full description of the register and the bits will pop up on the screen.

    // 'Power Config' - 0x9234 = 0x2D80

    // Setting the DSLP_LDO bit allows the LDOs to remain active when the device goes into Deep Sleep mode

    // Set wake speed bits to 00 for best performance

    // This 0x2D80 includes SLEEP_EN, on-chip over temperature, more clear in 136 of TRM

    BQ769x2_SetRegister(PowerConfig, 0x2D80, 2);

    // 'REG0 Config' - set REG0_EN bit to enable pre-regulator

    // Not use LDO supplied by BQ including REG1 and REG2, leave this pin reset state: 0x00, and have to supply external to REG0 Pin

    // Use LDO including REG1, REG2, leave this pin set state: 0x01

    BQ769x2_SetRegister(REG0Config, 0x01, 1);

    // 'REG12 Config' - Enable REG1 with 3.3V output (0x0D for 3.3V, 0x0F for 5V)

    // This register reserved for Setting up how much values of REG1 and REG2

    BQ769x2_SetRegister(REG12Config, 0x0D, 1);

    // Set DFETOFF pin to control BOTH CHG and DSG FET - 0x92FB = 0x42 (set to 0x00 to disable)

    BQ769x2_SetRegister(DFETOFFPinConfig, 0x00, 1);

    // Set up ALERT Pin - 0x92FC = 0x2A

    // This configures the ALERT pin to drive high (REG1 voltage) when enabled.

    // The ALERT pin can be used as an interrupt to the MCU when a protection has triggered or new measurements are available

    //BQ769x2_SetRegister(ALERTPinConfig, 0x2A, 1);

    // Set TS1 to measure Cell Temperature - 0x92FD = 0x07

    BQ769x2_SetRegister(TS1Config, 0x07, 1);

    // Set TS3 to measure FET Temperature - 0x92FF = 0x0F

    //BQ769x2_SetRegister(TS3Config, 0x0F, 1);

    // Set HDQ to measure Cell Temperature - 0x9300 = 0x07

    BQ769x2_SetRegister(HDQPinConfig, 0x00, 1); // No thermistor installed on EVM HDQ pin, so set to 0x00

    // 'VCell Mode' - Enable 16 cells - 0x9304 = 0x0000; Writing 0x0000 sets the default of 16 cells

    //BQ769x2_SetRegister(VCellMode, 0x0000, 2);

    BQ769x2_SetRegister(VCellMode, 0x01FF, 2); // used 9 cells

    // Enable protections in 'Enabled Protections A' 0x9261 = 0xBC

    // Enables SCD (short-circuit), OCD1 (over-current in discharge), OCC (over-current in charge),

    // COV (over-voltage), CUV (under-voltage)

    BQ769x2_SetRegister(EnabledProtectionsA, 0xBC, 1);

    // Enable all protections in 'Enabled Protections B' 0x9262 = 0xF7

    // Enables OTF (over-temperature FET), OTINT (internal over-temperature), OTD (over-temperature in discharge),

    // OTC (over-temperature in charge), UTINT (internal under-temperature), UTD (under-temperature in discharge), UTC (under-temperature in charge)

    //BQ769x2_SetRegister(EnabledProtectionsB, 0xF7, 1);

    BQ769x2_SetRegister(EnabledProtectionsB, 0xF4, 1);

    // 'Default Alarm Mask' - 0x..82 Enables the FullScan and ADScan bits, default value = 0xF800

    BQ769x2_SetRegister(DefaultAlarmMask, 0xF886, 2);

    // Set up Cell Balancing Configuration - 0x9335 = 0x03 - Automated balancing while in Relax or Charge modes

    // Also see "Cell Balancing with BQ769x2 Battery Monitors" document on ti.com

    // Balancing in Charging mode, relax mode, and sleep mode

    // Cell balancing only in Relax mode

    BQ769x2_SetRegister(BalancingConfiguration, 0x02, 1);// 07

    // Minimum cell temperature to prevent cell balancing is set to -127 degree

    BQ769x2_SetRegister(MinCellTemp, -127, 2);

    // Maximum cell temperature to prevent cell balancing is set to 127 degree

    BQ769x2_SetRegister(MaxCellTemp, 127, 2);

    // Maximum cell internal temperature to prevent cell balancing is set to 127 degree

    BQ769x2_SetRegister(MaxInternalTemp, 127, 2);

    // Time interval between cell balancing event is 1 s

    BQ769x2_SetRegister(CellBalanceInterval, 10, 2);

    // Number of cells are balanced in the same time is 2

    BQ769x2_SetRegister(CellBalanceMaxCells, 5, 2);

    // Maximum voltage threshold of each cell to allow balancing in charging is 2,5 V

    BQ769x2_SetRegister(CellBalanceMinCellVCharge, 2500, 2);

    // Minimum difference of cells to start balancing is 30 mV in charging mode

    BQ769x2_SetRegister(CellBalanceMinDeltaCharge, 10, 2);

    // Difference of cells to stop balancing is 20 mV in charging mode

    BQ769x2_SetRegister(CellBalanceStopDeltaCharge, 3, 2);

    // Maximum voltage threshold of each cell to allow balancing in relax is 2,5 V

    BQ769x2_SetRegister(CellBalanceMinCellVRelax, 2500, 2);

    // Minimum difference of cells to start balancing is 30 mV in relax mode

    BQ769x2_SetRegister(CellBalanceMinDeltaRelax, 15, 2);

    // Difference of cells to stop balancing is 20 mV in relax mode

    BQ769x2_SetRegister(CellBalanceStopDeltaRelax, 10, 2);

    // Charge current threshold: 500 mA, allow BQ know is in Charging

    BQ769x2_SetRegister(ChgCurrentThreshold, 200, 2);

    // Discharge current threshold: 500 mA, allow BQ know is in Discharging

    BQ769x2_SetRegister(DsgCurrentThreshold, 500, 2);

    // Set up CUV (under-voltage) Threshold - 0x9275 = 0x31 (2479 mV)

    // CUV Threshold is this value multiplied by 50.6mV

    BQ769x2_SetRegister(CUVThreshold, 0x31, 1);

    // Set up COV (over-voltage) Threshold - 0x9278 = 0x55 (4301 mV)

    // Tang gia tri neu dien ap cell pin bi qua ap khong the sac duoc, gia tri hex quy doi sang dec, roi nhan voi 50,6 mV

    // COV Threshold is this value multiplied by 50.6mV

    BQ769x2_SetRegister(COVThreshold, 0x5E, 1);

    // Set up OCC (over-current in charge) Threshold - 0x9280 = 0x05 (10 mV = 10A across 1mOhm sense resistor) Units in 2mV

    BQ769x2_SetRegister(OCCThreshold, 0x32, 1);

    // Set up OCD1 Threshold - 0x9282 = 0x0A (20 mV = 20A across 1mOhm sense resistor) units of 2mV

    BQ769x2_SetRegister(OCD1Threshold, 0x0A, 1);

    // Set up SCD Threshold - 0x9286 = 0x05 (100 mV = 100A across 1mOhm sense resistor) 0x05=100mV

    BQ769x2_SetRegister(SCDThreshold, 0x05, 1);

    // Set up SCD Delay - 0x9287 = 0x03 (30 us) Enabled with a delay of (value - 1) * 15 µs; min value of 1

    BQ769x2_SetRegister(SCDDelay, 0x03, 1);

    // Set up SCDL Latch Limit to 1 to set SCD recovery only with load removal 0x9295 = 0x01

    // If this is not set, then SCD will recover based on time (SCD Recovery Time parameter).

    BQ769x2_SetRegister(SCDLLatchLimit, 0x01, 1);

    // Exit CONFIGUPDATE mode - Sub-command 0x0092

    CommandSubcommands(EXIT_CFGUPDATE);

    HAL_Delay(10);

    CommandSubcommands(FET_ENABLE); // Enable the CHG and DSG FETs

    HAL_Delay(10);

    BQ769x2_BOTHOFF();

    HAL_Delay(10);

    CommandSubcommands(SLEEP_DISABLE); // Sleep mode is enabled by default. For this example, Sleep is disabled to

    HAL_Delay(240);

    }