Tool/software:
Hello TI Forum (and Stefan?)
unfortunately, we have an issue when trying to limit the current over the ISNSx input.
Would someone have a clue why we see this behavior?
- We limit the input current
- Over PWM and a low pass we are able to inject an additional signal between the two ISNS pins.
- By this we can inject 0 - 64mV on top of the voltage which is generated by the input current and its respective shunt (also measured by scope)
- Hence, we are able to not limit the current any further beside what the shunt already does (0mV applied) up to limit it fully to an input current of 0A (if > ~50mV applied)
- PWM has 6400 steps and a resolution which translates to about 5-10mA per step (measured by multimeter)
Initial test condition
- Vin by power supply unit: 32V (I limit set to 12A)
- Vout: 46V (purely set by FB divider and no injection)
- Dynamic load at output: Either CR or CC (e.g. 13 Ohm or 3A)
Test Process
1 Step
- Signal Injection: off
-> Vin 32V, Iin 5.1A
-> Vout 46V, Iout 3.41A
-> stable
2 Step
- Signal Injection: on, duty cycle 3000/6400
-> Vin 32V, Iin 4.8A
-> Vout 44.5V, Iout 3.3A
-> stable
-> Limiting Iin works, shown by the reduced Iin and Vout
3 Step
- Signal Injection: on, duty cycle 3200/6400
-> Vin 32V, Iin 0 - 4.8A
-> Vout 2 - 43.5V, Iout 0.3 - 2.9A
-> unstable
4 Step
- Signal Injection: on, duty cycle 3200/6400
-> Vin 34V, Iin 4.1A (needed to increase Vin though ! )
-> Vout 42.5V, Iout 3.2A
-> stable
-> Limiting Iin works again as we could decrease Iin further
Bugfix attempts so far
- We use the TI LM5177 design spreadsheet and tried out quite some different R and C combinations on COMP, IMONOUT and SLOPE.
- Also tried having smaller and bigger RC time constants of the IMONOUT compensation compared to COMP
- Furthermore, we also tried different low passe filters on ISNS.
- MODE and CONFIG: PSM active, DRSS on, HICCUP on, PSM entry 10%, ILIMIT positive
- 3 different power supplies tried
- Nevermind what we try, if Vout reaches about 43-42V (Vout without current limiting 46V) at 32V Vin, the output gets instable.
- Though, if we increase Vin e.g. from 32 to 34V, the output gets stable again
Question
Could this rather be an internal control issue or a behavior we've missed out in the datasheet? Or is there a dependency of the output voltage regulation which we miss?
For example, we’ve sometimes also seen the issue that even though 64mV is applied to the ISNSx pins (being much above 50mV), the IC does not regulate down Iin and still lets 2A flow. Normally, if we apply > 50mV the IC regulates down to Iin 0A, what is our expected behavior.
Any help is much appreciated! Thank you!
