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TPS1211-Q1: Device behavior when Rshunt or CS+/- short condition

Kazuki Kuramochi
Genius 10495 points
Part Number: TPS1211-Q1

Tool/software:

Hello Expert,


I want to make sure about behavior of device.


What will it happen when Rshunt or CS+/- shorted?

I suppose that it only cause disable of IMON and OCP but it won't lead disable of Pass FET.

Best regards,
Kazuki Kuramochi

  • 0
    TI__Expert 8440 points

    Hi Kazuki-san, 

    Do you mean if Rshunt is shorted to CS+/-? Could you provide a picture? 

    I'm not sure I'm capturing your question so let me give a few pointers. 

    RSET between RSHUNT and CS+ is required to limit current to GND. 

    To properly disable SCP you must connect ISCP to CS-. This gauntness the voltage at SCP does not trigger SCP threshold set by RISCP. 

    The difference between CS+/- cannot exceed 0.3 V so you must also consider this or you will damage device. 

    To disable OCP you just need to connect IWNR directly to GND. 

    Thanks, 

    Sarah

  • 0 in reply to Sarah Raines
    TI__Genius 10495 points

    Hi Sarah-san,

    My questions is just for what behavior will it happen during abnormal condition for debugging.
    I don't intend to disable OCP by the connection.

    What is the expected behavior which is caused by following short condition as written by red line and blue line below?

    Best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 8440 points

    Hi Kazuki-san, 

    If you do not have an RSNS resistor as shown with red line then there will theoretically be no sensing. But at the same time you would probably be very susceptible to noise so you may see false ISCP triggers. 

    If CS+/- is shorted as shown on blue line similar behavior could be expected, but its important to note that the RSET is required to limit current on CS+. Ideally connecting CS+/- to one another guarantees that the two pins are kept at the same voltage and therefore the comparator will not trigger anything. 

    Thanks, 

    Sarah

  • 0 in reply to Sarah Raines
    TI__Genius 10495 points

    Hi Sarah-san,

    I want to make sure about whether there is the other risk from this condition.

    Is there risk of disabling device's operation or cause damage from this situation?

    Best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 8440 points

    Hi Kazuki-san, 

    Yes there is risk. You will not have working current protections in this configuration and may also experience false FLT LOW, which will shut off the device. 

    Thanks, 

    Sarah