Tool/software:
Hello,
I am working on a device where the main semiconductor manufacturer has stated that the TLV part should not have R1 and R2 (or C3) loaded at all, meaning the FB is floating.
The input voltage is 3.3V
What would result if this is the case, and what would the output voltage be?
I am trying to find out why this was changed, but I cannot spot anything in the datasheet which would support this layout.
Previously we had 499K for both R1 and R2, and 22pF for C3. But they want all these as DNM/DNP components, making the FB open.
Please advise what would result
TLV62569DBVR
Thanks