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TPS4810-Q1: Soft Start design support need

Part Number: TPS4810-Q1
Other Parts Discussed in Thread: TPS1210-Q1,

Tool/software:

Hi expert,

My customer (CosMX) is designing TPS4810-Q1 schematic and want to know how to design the soft start of TPS4810-Q1/ TPS1210-Q1. Could you share some principle information or reference design? Thanks.

Best Regard,

Ryker

  • Hi Ryker, 

    The TPS4810/1210 device can handle "soft start" in two ways: 

    1.) Slew rate controls at the FET gate to control INRUSH. For this consider section "7.3.2 Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control" of the datasheet. Here we detail how you can select R1, R2, and C1 to help mitigate INRUSH. 

    For reference, you can also you the online calculator tool, which can help you select appropriate values for this and the TPS4810 EVM which does implement the use of the R1 value to control the pull up time and the gate resistors which are a good practice to limit line inductance that can cause ringing at the gate during turn on. 

    Calculator: https://www.ti.com/product/TPS4810-Q1#design-tools-simulation

    TPS4810 EVM: https://www.ti.com/tool/TPS4810Q1EVM

    2.) Pre charge path. If you know you will be turning on with a high capacitive load you can consider using the second gate of TPS4810 for a separate pre charge path. This can help charge the output capacitance prior to turn on of the main FET path and reduce INRUSH. 

    Thank you, 

    Sarah