TPS6594-Q1: BOOT BIST reaction

Thanks for the explanation. I have one follow up question, what is the meaning of device is power cycled here? If recovery count reaches the maximum threshold then device stays in safe recovery state. Is there any action needed like PMIC power supply on/off to recover from this condition (Second level recovery attempt)

One more point is - in case of BIST failure (PMIC stuck in Safe recovery state) power supply to the SOC will not be guaranteed and reading anything by SOC over communication channel will not reliable. I assume, BIST failure will not send a falling edge on nRSTOUT. So how should SOC ideally shall react in this scenario.

Manish Kolte said:

I have one follow up question, what is the meaning of device is power cycled here?

The input power to the PMIC must be cycled. As stated in data sheet excerpt, VCCA voltage must drop below VCCA_UVLO. 

Manish Kolte said:

One more point is - in case of BIST failure (PMIC stuck in Safe recovery state) power supply to the SOC will not be guaranteed and reading anything by SOC over communication channel will not reliable. I assume, BIST failure will not send a falling edge on nRSTOUT. So how should SOC ideally shall react in this scenario.

A few points:

1. PMIC can be stuck in Safe Recovery state for many different types of failures. Once the recovery counter reaches limit, it stays there.

2. A BOOT_BIST failure will send nINT low and send PMIC to Safe Recovery. Unless there has been some corruption to the device, the chance that BOOT_BIST failure will max out a high recovery counter threshold is very low. 

Hello Michael,

I got your point, but my issue is

1. BIST Failed at the start up, PMIC goes to Safe recovery & power is not supplied to the MCU/SOC

2. as per your response nINT is raised and SOC shall act based on nINT

3. But as power itself is not supplied to MCU/SOC, my point is any action of nINT how SOC will handle this. its not reliable to do so. 

Manish Kolte said:

2. as per your response nINT is raised and SOC shall act based on nINT

3. But as power itself is not supplied to MCU/SOC, my point is any action of nINT how SOC will handle this. its not reliable to do so. 

BIST_FAIL -> Immediate Shutdown -> Safe Recovery

If recovery counter is less than the rec_cnt_thr, PMIC will execute BOOT_BIST and try again. 

If the recovery counter threshold is 15 and the PMIC hits 15 Boot_Bist Failures in a row, there isn't anything the SoC can do. 

But on a successful Boot_Bist Pass and PMIC Boot Up, the SoC should run diagnostics and clear the interrupts and move forward.