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BQ25756: Chip failure when starting charge cycle

Part Number: BQ25756

Tool/software:

Hi There

We have a board based on the BQ25756 that we are busy developing to use in our product, but we are encountering some issues, and the BQ25756 IC is dying/breaking/failing as a result with no charging occurring. I am unsure of the exact reason/reasons. Below is some information regarding the PCB and the failure(s):

Operating parameters:

  • 250kHz Switching Frequency
  • Input voltage range from 10V to 70V (Initial tests @24V)
  • Charge Current 19.5A (Initial test set to 400mA) (800W charging wattage)
  • 14S Lithium Ion Battery (Initial test set to 8S, 8S battery with resistor divider changed accordingly)
  • 15uH Inductance

When allowing the IC to be powered with DRV_SUP connected to REGN and charge disabled (CE pin floating) it powers up, I2C communication is functional. When setting the registers to the appropriate settings and pulling CE low, the chip shuts down and will not do anything further until reset by removing power and re-powering.

When powering the IC with DRV_SUP connected to an 8V regulator, setting the registers appropriately and pulling CE low, the chip dies with DRV_SUP shorted to PGND permanently.

When repeating the same test with a 400mA limit on the input power supply and battery disconnected, the chip will start the charge cycle and start switching very briefly before the current limit on the PSU gets exceeded, and thereby the system shuts down. The chip does not die in this case, and the test can be repeated. If this input current limit (on the power supply) is removed, the chip dies and draws about 1.6A (and heats up excessively), with DRV_SUP shorted to PGND permanently.

In all cases, the chip seems to go through it's initial stage of toggling the SW node to figure out the compensation network (as according to P21 on the datasheet) without issue, although this does not seem to last a full 40ms.

I suspect the fault lies on the FET drive side of things, as this is also the side of the IC that emits the heat when the chip fails (seen via thermal camera).

Any help with this will be greatly appreciated and I would be happy to provide more information if/when needed. When designing the PCB I did consult the BQ25756 EVM schematic for further information, as well as following the layout guidelines in the datasheet as far as possible.

Thanks in Advance!

  • Hello Jadon,

    I have a few questions to help us debug this:

    Can you send me the schematic of the charger?

    When powering the IC with DRV_SUP connected to an 8V regulator, setting the registers appropriately and pulling CE low, the chip dies with DRV_SUP shorted to PGND permanently.

    This is very strange. Is DRV_SUP shorted to REGN here? These pins should not be shorted when using an external gate drive supply.

    Also, can you check the IC's status and flag registers?

    Best Regards,
    Ethan Galloway

  • Hi Ethan

    Thank you for your reply. Is there a possibility of me emailing the schematic to you rather than posting it here? If not, I will post here but would prefer to email it.

    This is very strange. Is DRV_SUP shorted to REGN here? These pins should not be shorted when using an external gate drive supply.

    No, REGN was disconnected from DRV_SUP when external gate drive supply was used. This is the way the board was designed to operate as the REGN regulator would be pushed out of it's SOA when using the full input voltage. I suspected a problem related to how the DRV_SUP pin was being driven to cause the failure initially, hence I decided to power it from REGN as part of the process of elimination.

    The IC's status registers listed nothing of concern. All statuses were normal. I even tested by lowering the input voltage to below the ACUV threshold and the statuses changed accordingly.

    I have unfortunately only got one single BQ25756 left to test with, but have ordered more. Unfortunately they will only arrive late next week so I would like to troubleshoot using the findings I have so far before attempting with the last one, to avoid downtime.

    Thanks and Best Regards

    Jadon

  • Hello Jadon,

    Thank you for your reply. Is there a possibility of me emailing the schematic to you rather than posting it here? If not, I will post here but would prefer to email it.

    Yes, I've sent you a friend request over E2E. Can you private message me the schematics there? Let me know if that works for you.

    No, REGN was disconnected from DRV_SUP when external gate drive supply was used. This is the way the board was designed to operate as the REGN regulator would be pushed out of it's SOA when using the full input voltage. I suspected a problem related to how the DRV_SUP pin was being driven to cause the failure initially, hence I decided to power it from REGN as part of the process of elimination.

    The IC's status registers listed nothing of concern. All statuses were normal. I even tested by lowering the input voltage to below the ACUV threshold and the statuses changed accordingly.

    Thanks for doing these tests. This will be helpful.

    Best Regards,
    Ethan Galloway

  • Hi Ethan

    I have private messaged you, thanks so much

  • Hello Jadon,

    Thanks. I'll get back to you next week on this.

    Best Regards,
    Ethan Galloway

  • Hello Jadon,

    Thanks for working with me on this. I'm marking this thread as resolved.

    Best Regards,
    Ethan Galloway