• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 63 subscribers
  • Views 104 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ76972: Occasional reset of coulomb counter to -327 Ah

Lars Theil Hansen
Prodigy 10 points
Part Number: BQ76972

Tool/software:

Hi,

During development of a BMS for 50 Ah 8S or 16S LiFePO4 battery cells, we have encountered an unexpected behavior of the BQ76972 IC. Our BMS is intended for normal current is in the 10 – 60 A range, and peaks up to 120 A are occasionally present. Our BMS design in general follows the guidelines given the BQ76972 Technical Documentation list. Nothing unconventional.

From time to time we see that the coulomb counter (Ah counter) is set to -327 Ah, and we also see that the BQ76972 IC sometimes enter a state, where internal values and outputs become illegal for a fixed period of time, always around 6 ms, and then returns to legal values. These upsets (latch-up?) seem to be correlated with short (perhaps 100 us to 3 ms) load current spikes in the 50 to 100 A range. These current spikes do not trigger any overcurrent limits, as they are well within what we have set the BMS to allow.

In our mind the problem could be related to voltage spikes at the current sense inputs (pins no. 18 and 20), as these pins are specified only to tolerate voltages close to the VSS level (pin no. 17). However, we have tried to protect these sensitive inputs against voltage spikes, and it is difficult to measure if any spikes are present. Perhaps the VC0 to VSS voltage could also be a problem.

Any idea of where to look for the origin of the above described problems? Why reset to -327 Ah? Are we looking the right place? Should we direct our attention to other parts of the circuit  also/instead?

  • 0
    TI__Expert 5090 points

    Hi Lars,

    Sorry for the delay in responding!  I haven't noticed what happens to the Coulomb counter integration value, but your mention of ~6ms sounds familiar.  It is possible during a large current transient, if the connections between the SRP side of the sense resistor is not very close to the VSS pin connection, that both SRP and SRN pin voltages can spike above ~0.75V, and this can lead to a brief reset-like event in the device.  Normally the SRP side of the sense resistor should be connected to VSS, but if there is enough IR drop along a trace during the load transient, this can lead to SRP seeing a voltage spike.

    The solution to this is making sure SRP doesn't spike above 0.75V during any load transients.  What can help is to add a cap from the SRP pin to VSS, which helps hold the voltage closer to VSS.  As an experiment (if this is very repeatable in your system), you could try shorting the 100-Ohm filter resistor at SRP, see if that prevents it occurring.

    Thanks,

    Terry

  • 0 in reply to -Terry
    Prodigy 10 points

    Hi Terry,

    Thank you for the response.

    Following your input we have changed our VSS/grounding philosophy.

    Initially we assumed that it would be best to keep the VC0 (voltage at the lowest cell negative terminal) and the VSS (negative supply voltage for the bq76972 IC) potential equal, and accept that the unavoidable cable and PCB resistance between would induce some voltage between the SRP and VSS pins during battery current spikes. Our estimate was that we could keep these voltage spikes at levels around 100 mV, which should be acceptable. However, in reality, stray inductance generated very short spikes of several hundreds mV.

    Now we have moved the VSS pin connection close to the battery side of the current sense resistor – where the SRP pin is connected (through 100 Ohm). The consequence is that short voltage spikes are now present between VSS and VC0, but these can be filtered down to the 100 mV range by the cell voltage filter components already present in the circuit, and it seems that the IC can tolerate these spikes without any malfunction.

    All in all it seems that the problem has been solved.

    Best regards

    Lars