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UCC28064A: Strange 'half' pulse on phase A breaks interleaving

Part Number: UCC28064A

Tool/software:

Hi,

I have a 600W PFC, running from aircraft 400Hz, 115V AC - generating 400V DC for an LLC stage.

If I disable phase B (tying PHB high) , it works very nicely in single phase mode up, delivering up to about 270W before it hits the max on time of the FETs.

When I enable phase B, again it works fine, in interleaved mode, until we get to about 230W, when I observe a solitary half-width 'on' pulse on GDA, the same time/voltage level after the zero-cross point, which then puts the two channels into phase with each other.   They then remain in phase for the majority of the duration of the half-cycle before dropping back into interleaved mode at about the same time/voltage before the next zero-cross.

Obviously when the two channels are in-phase, the total current is much higher than it should be when they are working out of phase.
I've monitored the COMP and ZCDx lines and don't see anything around the point of change.  I'm fairly sure it's not spurious noise as it's so consistent - every half cycle is the same and the 'glitch' occurs at exactly the same point every time.

If I vary the load, the percentage of the half-cycle which is in phase (out of interleave) changes.  Likewise, if I change the input voltage, it changes.

      

These images (different loads) show VINAC (yellow), COMP (cyan) - difficult to see against the pink, but value measured on the right, GDA (pink) and AC current (blue).

Here is a zoom-in on the transition.  You can see, just to the right of the cursors, that we get a short on-pulse on GDA and following this GDA and GDB run 100% in phase for the remainder of the cycle until the input voltage drops to the same level.  It isn't shown, but I monitored ZCDA and ZCDB around this point, and we get a normal pulse at the end of each on-pulse.

What could be causing this, or what else can I tell you or measure to help you diagnose what's going on here?

My inductor is 225uH (Wurth 760805410), Fet: IPL60R085P7, Diode: TRS4V65H, Rcs shorted out.

TIA - Tom.

  • Hello Tom, 

    This issue is caused by noise getting into the CS input.  Not spurious noise, I agree, but systematic noise.  Switching noise most likely. 

    I presume that you shorted out the current sense resistor to avoid triggering cycle-by cycle CS overcurrent response, but it is happening anyway.  I also presume that you have an R-C filter network connecting Rcs to the CS input. 
    On those presumptions, I suspect that switching noise is coupling into CS by going "around" the R-C filter, either by having amplitude high enough that the CS cap is not strong enough to filter it out, or that the CS cap is terminated to a point in the PGND that still contains some switching ripple current which "bounces" the CS signal above the PGND at the IC itself. 

    The half-pulse width at GDA is due to both phases being shut off at the same time due to that noise pulse.  
    Prior to that point the noise was there, but the peak amplitude at CS was not high enough to trigger the OC shutdown.  After that point, the noise was continually high enough to recurrently trigger OCP each cycle.  Both phases restart in-phase in the next cycle after an OCP shutdown and would move apart to ~180 in a few cycles, except that the noise retriggers OCP again. 
    This continues until the line voltage drops low enough that the noise also drops low enough to stop retriggering OCP. 

    I recommend that your CS filter cap should be connected to the CS and GND pins of the UCC28064A as closely as possible, and the R of the R-C filter also be close to the CS input to minimized opportunity for noise to couple to the CS node.

    If this is already done, then experience has shown that only a larger value of filter cap will squelch the noise.
    An RC filter adds a time delay to peak current detection.  So a larger cap with the same R will delay longer, allowing higher peaks before being triggered.  If a larger cap solves your noise problem, you may experiment with using a slightly higher Rcs value to restore the lower peak level for triggering OCP. 

    Regards,
    Ulrich.