This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ76952: Unexpected 46V on CHG Pin When FETs Are Disabled – BQ76952

Part Number: BQ76952

Tool/software:

Dear Texas Instruments Support Team,

I am currently developing a Battery Management System (BMS) using the BQ76952 IC to monitor a 16-cell LiFePO₄ battery pack (51.2 V, 100 Ah per cell). I am communicating with the BQ76952 via I²C using an STM32 microcontroller.

While testing, I observed unexpected behavior related to the CHG pin:

  • Both CHG and DSG FETs are disabled (confirmed via register 0x0020 – both bits are 0).

  • The FET_EN bit in ManufacturingStatus (register 0x0057) is also cleared (value = 0).

  • However, I am still measuring ~46 V at the CHG pin of the BQ76952.

  • No external FET gate is connected to the CHG pin at this point.

I understand the CHG pin is a gate driver output and can be high-impedance when FETs are disabled, but I would like to confirm:

  1. Is it normal for the CHG pin to float up to battery voltage (~46 V) in this case?

  2. Should I add a pull-down resistor to ensure it remains low when unused?

  3. Are there any recommended configurations for safely leaving CHG unconnected?

Any guidance you can provide on this behavior would be greatly appreciated.

Best regards,

Oussama.D

  • Hello Oussama D,

    Yes, this is normal because this is a high side gate driver and this is not "floating" voltage. The voltage on this pin will follow the total pack voltage as well.

    The CHG pin which is connected to the gate of the high side NMOS will hold the voltage at the same level as the voltage at the source pin of the NMOS in "OFF" condition. When in "ON" state, this CHG pin will rise 5.5V or 11V (depending on what drive level is selected) above the voltage on the source pin thereby increasing the V(GS) voltage and hence turning the FET on.

    This is the working of a high side FET driving circuit. Please follow TI's recommendation for the CHG pin circuitry. And as can be seen in Table 16-3. Terminating Unused Pins of the datasheet, CHG pin can be left floating if not used.

    Best,
    Abhijith