LM5122: Schematic and layout review

PowerSupply.rar

Hi Joao,

Thanks for using the e2e forum.
Unfortunately, I cannot open kicad_pcb files. However, based on the pictures you attached, I already got an overview of the layout.

Here are my comments:
Schematic:
- No input caps are used. This is highly recommended to achieve a stable input voltage
- To double check if the compensation is already optimized, I recommend to use our quickstart calculator: https://www.ti.com/tool/download/LM5122-BOOST-CALC
(This calculation tool was updated recently to give better compensation value recommendations. Right now the results do not match with the datasheet anymore, as the datasheet update takes longer. All other formula in the datasheet is not affected.)

Layout:
- It looks like you are using the outer layers mainly as a VIN plane. I would highly recommend to make large areas a GND plane instead. This reduces noise levels across the whole board and also helps with thermal management.
- The loop from VOUT caps to GND connection of the FETs very short, which is good, but the input loop is rather long (CIN caps -> inductor -> MOSFET -> GND -> CIN caps)
Please account for this when adding input capacitance.

If you have limited experience with layouting such a design, I can highly recommend to take an existing design for reference, as they are already verified and proven for functionality.
I can recommend this design. (Vout is lower, but power levels are similar)
https://www.ti.com/tool/PMP21274

Best regards,
Niklas

Hi Niklas,
Thanks for providing a feedback so quickly.
- I followed the values in the datasheet and used 4 capacitors of 3.3uF (C31-C34). Are those not enough?
- Thanks for the heads up about the formulas, I will re calculate the values.
- I will turn the BAT+ planes into GND and use a copper pour for routing the VIN for the ICs
- I will follow the provided reference design as a guide for the placement of my components.

Best regards,
Joao

Hi Joao,

Thanks for correcting me. It seems like I overlooked the caps C31-34.
In a boost application, the output tends to require more caps than the input as the switch node is located after the inductor.
However, as this design has a power rating of 150W, 13uF of input capacitance is indeed rather small.
I would recommend to place an additional bulk capacitor on the input side. (e.g. 47uF or more) This will avoid drops of the input voltage during strong transients.

If you need an additional review after implementing the changes, feel free to get back to me.

Best regards,
Niklas

Hi Niklas,

Thanks for the guidance about the input capacitor.

On another note, there was an issue with our supplier and we will not be able to use the selected output bulk capacitors (3x 330uF, 59mOhm). I know that for this application low ESR is ideal, but what would be an acceptable value (how high)? And what would be the ideal capacitance value?

Thanks again,

Joao

Hi Joao,

Thanks for the feedback.

As you already mentioned, low ESR ceramic capacitors are ideal for filtering the switching noise.
The more ceramic capacitance you add, the lower the output voltage ripple.

However, due to the lower capacitance values, ceramic caps are not sufficient for fast transients of the load or input voltage.
Because of this, we recommend a combination of both ceramic caps (for reducing output voltage ripple) and bulk caps (for damping transient overshoots).

Regarding suitable capacitance values, I would recommend to use the quickstart calculator tool I mentioned in the previous reply.
This tool shows a Cout recommendation based on the output voltage ripple goals you set.

Best regards,
Niklas