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LM5177: Request circuit review

Part Number: LM5177
Other Parts Discussed in Thread: , CSD18540Q5B

Tool/software:

Hi, TI expert

I would like to request a review of the LM5177 circuit.

- System Spec.

  1. Vin : 8V~48V

  2. Vout : 12V

  3. Iout : 5A~8A

- Request 

  1. Circuit Diagram Review  (file attached)

  2. Review the quickstart calculation tool (file attached)

  3. Check FET specifications (data sheet attached)

Best Regard

Minsu ParkLM5177_Review_250708.pdfLM5177 Buck-Boost Quickstart Tool 검토_250708.xlsmPDC6986BX-5.pdf

  • Hi Minsu,

    Thanks for using E2E! Please allow some time to review on this and will feedback to you soon. 

  • Hi Minsu,

    Recommend using LM51770 as it's newer generation and it will be drop in replacement with LM5177. 

    Based on what you provide, please note that your sense resistor Rs is greater than expected and that will influence your current protection. 

      • Note: I did not check all values to match schematic, reference for the review are the values in the Quickstart calculator

        Please see below my review list and bold marked line items which should be checked again (Note: other info are left here to give an overview of what has been checked)

        (Underlined parts not checked as info is missing)

        Checked with Quickstart Calculator

      Schematic:

        • Recommend to use LM51770 (newer and to replace LM5177)
        • Rcs in series with inductor and before inductor
        • Check filter for Rcs
          Current sense Resistor Rcs does not have the required filter
        • Check filter for Risns

        Current sense Resistor Risns does not have the filter - recommend to add place holder

        • Connect IMONOUT to VCC if ISNS not used
        • Snubber on SW1 and SW2. Place Footprint for a snubber at SW1 and SW2
           (they can then be populated in case needed (e.g. due to EMI) without layout change)

        Note: Snubber connect Resistor to GND for better Thermal performance

        • BIAS connected

        If BIAS is not used connect to GND or VIN of VOUT (do not keep open)
        BIAS can be connected to VIN (if the max ratings of BIAS are not violated) to benefit from the better performance of the LDO on BIAS

        • Add Series Resistor into MOSFET Gate signals lines

        (they can then be replaced in case needed (e.g. due to EMI) without layout change,
        additional option: add a diode in parallel for slow on and fast off.
        Note: Good starting value is 3.3Ω and then adjust in when testing out the PCB

        • Voltage rating of MOSFET
          (Have a margin of 30% is recommended)
        • Miller Plateau of MOSFETs
          used MOSFETs need to be logic level MOSFETs - can be seen by Miller Plateau in the range of 2.5V-3.5V. Mosfet Datasheet Spec shows 1.6V typical.
        • UVLO setting relative to lowest input voltage
          UVLO is set to xV but operating range starts at xV - relative large distance
        • Cap at VCC (EVM uses: 47uF) : (Datasheet min: 10uF with DC Bias

        please check the cap on Vcc to have the required capacitance considering DC BIAS - we use a 47uF on the EV

       

  • Hi Alicia

    I will give you feedback on the answer you provided.

    Based on what you provide, please note that your sense resistor Rs is greater than expected and that will influence your current protection. 

     - Rs : 2.3mohm -> 2mohm

     - Switching Frequency : 290KHz -> 250KHz

    Check filter for Rcs Current sense Resistor Rcs does not have the required filter

     -  Added filter

    Check filter for Risns

    Current sense Resistor Risns does not have the filter - recommend to add place holder

     - Where can I find the EVK circuit or data sheet?

    Connect IMONOUT to VCC if ISNS not used

     - OK

    Snubber on SW1 and SW2. Place Footprint for a snubber at SW1 and SW2

     (they can then be populated in case needed (e.g. due to EMI) without layout change)

     - OK

    If BIAS is not used connect to GND or VIN of VOUT (do not keep open)
    BIAS can be connected to VIN (if the max ratings of BIAS are not violated) to benefit from the better performance of the LDO on BIAS

     - OK

    Add Series Resistor into MOSFET Gate signals lines

     - OK

    additional option: add a diode in parallel for slow on and fast off.

     - Deleted due to PCB space constraints


    Note: Good starting value is 3.3Ω and then adjust in when testing out the PCB

     - OK

    Voltage rating of MOSFET

    (Have a margin of 30% is recommended)

     - OK

    Miller Plateau of MOSFETs

    used MOSFETs need to be logic level MOSFETs - can be seen by Miller Plateau in the range of 2.5V-3.5V. Mosfet Datasheet Spec shows 1.6V typical.

     - M1, M2 : PDC6986BX-5 -> CSD18540Q5B(Web power designer reference)

     - M3, M4 : Apply PDC6986BX-5

    UVLO setting relative to lowest input voltage

    UVLO is set to xV but operating range starts at xV - relative large distance

     - How should I set UVLO when the minimum input voltage is 8V?

    Cap at VCC (EVM uses: 47uF) : (Datasheet min: 10uF with DC Bias

     - 47uF OK

    Best Regard

    Minsu Park

  • Hello Minsu,

    Please find the datasheet and user's guide here: https://www.ti.com/product/LM51770

    I share the LM51770 as we recommend using this device.

    Best regards,
    Brigitte