UCC5870-Q1: About Function BIST

Hi Yuki,

1. Could you check the SPI signals on a scope to ensure that they are meeting the device's timing requirements?

2. Are you following the requirements given in the function description?

Regards,

Max Verboncoeur

Hi Max
Thank you for your prompt reply.

1. I believe the SPI signals satisfy the requirements, since we can write to the CFG register and transition to the ACTIVE state. The waveforms of the first and second CLR_STAT_REG writes are exactly the same. To be thorough, I also tried inserting a NOP transmission and waiting several hundred microseconds between writing GATE_OFF_CHK and writing CLR_STAT_REG, but the result did not change. Please let me know if there is anything else I should check.

2. In this case, after enabling ITO1_EN and then writing to PS_TSD_CHK_SEC, I was able to generate a fault; however, I still cannot clear it with CLR_STAT_REG. Besides the considerations shown in Figure 7-43, are there any other timing precautions for sending each communication frame?

Best regards

Hi Yuki,

How quickly are you reading back the fault registers after sending the command to clear the faults? You may need to wait longer for the status registers to update.

Regards,

Max Verboncoeur

Hi Max,

After trying various things with Function BIST, we have observed the following behavior. Is this normal?

・After setting the ***CHK register in CONTROL2 to 1 and running the BIST, some registers automatically return to 0, while others do not.
・If we clear the fault while GATE_OFF_CHK is 1, the register returns to 0.
・For DESAT_CHK and PS_TSD_CHK_SEC, about 12 ms is required between the register operation and the fault‑clear command; if we do not wait, the fault is not cleared.

Hi Yuki,

Just to be certain, is the MCU controlling IN+ and IN- so that the output is at the correct level for these functions before the SPI commands are sent?

For GATE_OFF_CHK, the gate should be low, and for DESAT_CHK and PS_TSD_CHK_SEC, the gate should be high.

Regards,

Max Verboncoeur

Hi Max

Yes. We control IN+ and IN−, verify that OUTH reaches the state specified in the manual, and then execute the BIST.

Regards,

こんにちはマックス、

オシロスコープの波形が問題の解決に役立つ場合は、どの信号をキャプチャする必要があるかをお知らせください。
または、すべてのBISTを順番に実行したときに得られたnFLT、INP、OUT、CSの波形を、あなたの側で見せていただけますか?

よろしく

Hi Yuki,

Let me check this on an EVM and get back to you on Monday.

Regards,

Max Verboncoeur

Hi Max,

Thank you for checking.

May I assume that the same behavior was also observed for the wait times of DESAT_CHK and PS_TSD_CHK_SEC?

Regards,