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Original question:

LM7480-Q1: Common drain ORing concept

LM7480-Q1: LM7480-Q1 the OUT pin Sink current

Ben
Intellectual 400 points
Part Number: LM7480-Q1
Other Parts Discussed in Thread: LM7480

Tool/software:

Hi TI team.

Previously, I asked Common drain ORing design concept :  LM7480-Q1: Common drain ORing concept 

When I measure VMAIN_OUT voltage on the disabled LM7480 ICs, the value is abnormal.

For more detail information, see the diagram.

<Test step>

1. No application load.

1. Adapter 1 : attached. 48V.

2. Adapter 2 : detached.

3. Both of LM7480 : Not enabled

4. VOUT_AWO : 48V (from 1st FET body diode)

5. Enabled Extra Load SW at VOUT_AWO line.

6. R1 resistor upper side measured : 48V

7. node1 measured : 2.67V. ??? I expected 24.8V by voltage divider.(68k//(68k+4.7k)

Suspected point.

1. VOUT_MAIN node is connected to the OUT pin of LM7480 IC.

2. VOUT_MAIN is not connected to any other node.

3. The body diode of 2nd FET(LM7480) isn't conducting current because common drain is higher (=48V).

So I think VMAIN_OUT current is flowing into the OUT pin of the LM7480 IC. what am I missing for debugging?

Thank you.

  • 0
    TI__Guru 55650 points

    Hi Ben,

    Thanks for all the data.

    If you donot turn-on the load SW, what voltage level do you see at node1?

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Intellectual 400 points

    Hi Shiven

    Node1 is measured approximately 0.4V (almost zero) when the load SW is off. (LM7480s is also off)

    I want to voltage monitor at node1 before turning on the LM7480s, so I'm using a pull-up voltage source from the VOUT_AWO line.

    Each load SW control by MCU.

    Thank you.

  • 0 in reply to Ben
    TI__Guru 55650 points

    Hi Ben,

    Looks like the SW is doing something since when its off, node1 is zero and working as expected.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Intellectual 400 points

    Hi Shiven

    No, the load SW doesn't affect this circuit. I tried to short VOUT_AWO to Node1, got the same result.

    If I enable the LM7480, Node1 is at 48V as expected.

    So I suspect that the OUT pin of the LM7480 is sinking current.

    Thank you.

  • 0 in reply to Ben
    TI__Guru 55650 points

    Hi Ben,

    Can you break the connection from NODE1 to OUT pin and verify?

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Intellectual 400 points

    Hi Shiven

    I broke the connection from NODE1 to the OUT pin. It worked as I expected.

    I think the OUT pin has low impedance even when the LM7480 is disabled, so the voltage divider doesn't work.

    Do you have any idea how to fix this circuit? Or can you recommend another load switch to meet this concept?

    Thank you.

  • 0 in reply to Ben
    TI__Guru 55650 points

    Hi Ben,

    When the controller is disabled, OUT is shorted to HGATE, can you verify if thats happening? VGS of Q2 FET should be low.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Intellectual 400 points

    Hi Shiven

    I measured it when I turned on the load switch from VOUT_AWO. (LM7480 is disabled always.)

    The left side of the picture shows the result after disconnecting the connection from Node 1 to the out pin.

    The gate of Q2 FET doens't do anything.

    The right side of the picture shows the result when node 1 is connected to the out pin.

    The node 1 is at just 2V, and the gate voltage of Q2 is about -0.3V from the GND level. means Vgs is about 2.3V.

    - Yellow : Vgate-to-GND of Q2 FET

    - Red : Node1

     

    Thank you.