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BQ25620EVM: About 2.4.3 Charger Mode Verification set up

Part Number: BQ25620EVM

Tool/software:

Hi team,

Our customer is evaluating this device with EVM. In 2.4.3 Charger Mode Verification section, set-up Single-bit registers should be below figure after 2.2 Hardware Setup.

In this figure, VSYS_STAT is "Not in VSYSMIN regulation (BAT>VSYSMIN)". But as following 2.4 test procedure, VSISMIN is set 3520mV, and in 2.2 Hardware Setup, Load #1 is set 2.5V as VBAT.

So, in these setting, BAT is below VSYSMIN and VSYS_STAT become "In VSYSMIN regulation (BAT<VSYSMIN)".

Is my understanding is correct?

The customer wondering VSYS_STAT is said should be "Not in VSYSMIN regulation (BAT>VSYSMIN)" in this section.

Best regards,

teritama

 

  • Hi Teritama, 

    Yes your understanding is correct. With VBAT = 2.5V and VSYSMIN set to default 3.52V you would expect VSYS_STAT to output 'In VSYSMIN regulation'. 

    Apologies for the confusion caused by the image of the GUI. We will work to have this updated in the next revision of the User's Guide for the BQ25620EVM. 

    Best Regards,

    Garrett

  • Hi Garrett-san,

    Thank you for your answer. I understood and I'll share this information with the customer.

    We are looking forward to update this.

    Best regards,

    teritama