TPS43061: TPS43061RTER

Hi NIKLAS SCHWARZ ,

Thanks for the response 

I found one bug in my design there is a leakage path through the body diode of the top MOSFET, when the converter is off i will see a leakage and will create inrush to the supply ..

so I have modified the design like this this is this ok will this gate drive capable to turn on two fets ?Do you see any mistake in the design ?

To work for the below spec 

Hi Agxin,

Thanks for the feedback.
With this implementation, I am concerned about the Q13 MOSFT. Is it not about the driver strength, but about the orientation of the FET.
I understand you want to block current from the supply to the output during off-time, but if you place a MOSFET like this, you might have problems during operation.
For example, if you would have longer dead-times or a scenario where both LDRV and HDRV are turned off, the voltage at the switch node would spike as the inductor current has nowhere to go to. This would then damage the IC or the FETs due to overvoltage.

If you want to avoid current running from supply to output during shutdown of the device, I would recommend to implement a disconnect circuit before the power stage instead.
For example, we have the LM5121 device which uses a disconnect MOSFET for this exact purpose.

Best regards,
Niklas

Hi NIKLAS SCHWARZ ,

Thanks for the valuable feedback

But in the old schematics if I am not USING Q13 When Boost converter is not Enabled .. there is a leakage path , because of this I cannot completely disconnect the Top MOSFET ,in this case by Current limiter sense some over current during capacitor charging at the start , How does Q23 cut off it doesn't work at all .. the second loop that i have provided To monitor the output current and modify the VFB pin does't help because the Boost converter cannot cutt off the diode path any more till the output is higher than the input ..so during inrush it will create power trip

Also in the below topology how does the current limit mechanism work at the start (during inrush ) , are there any smart ways to fitter the controller with more features like inrush limit etc 

Hi Agxin,

By nature of the boost topology, you always have the direct connection from VIN to VOUT through the inductor and body diode of the high side FET.
The strong inrush current when the supply is turned on cannot be avoided by the controller. (This will happen even if the controller is still in shutdown mode)
The current limit function of the device does not apply here.

The solution to avoid this inrush current and also allow full discharge of VOUT if the device is not active would be to fully cut the supply voltage through additional circuit, or change the topology.
For this application, you can consider a SEPIC design with LM5155.
SEPIC has no direct connection from VIN to VOUT, so you do not have the inrush current problem anymore.

Best regards,
Niklas

Hi NIKLAS SCHWARZ ,

There are few Issues with this controller I am facing right now 

when I use SEPIC topology 

In fact my current boost in which i have problems with inrush

This is the same part you are proposing for SEPIC topology .

Even in the existing design if the converter supports higher say above 4 A i am ok to go with this part , Just i will modify it to SEPIC topology .

But when i increase the current I am getting this phase margin too low for the compensation circuit  .Does we bench supports retuning the comp network ?

how do i solve this ?

Will this doesn't help in such scenario ?

How about adding a Diode in SW node ?

sorry to check with you on more questions 

LM5121 if i go with this part for 7A ilim how do i calculate INRUSH2  when i feed my Vin MAX 15v The equation becomes negative  Are there any better explanation for this equation

Hi Agxin,

Webench does not support tuning of the compensation by the user, so there are cases where a design is definitely feasible, but webench cannot suggest you a design.
For such cases, I would recommend to use our quickstart calculator tool instead.
https://www.ti.com/tool/download/SNVR481

Another alternative is to look for reference designs. All the design shown here have been build and verified:
https://www.ti.com/reference-designs/index.html#search?keyword=lm5155

I also checked for SEPIC designs with synchronous controllers (high side MOSFET instead of diode).
Here I found this design using LM5122, which should match your specification quite well:
https://www.ti.com/tool/PMP31144

Agxin Justin xavier said:

Will this doesn't help in such scenario ?

How about adding a Diode in SW node ?

The dead-time is exactly the risk, because this is the time where both MOSFET are open and the inductor current is stuck.
A diode will help in this case, but I have never seen such a implementation with two high side FETs facing each other, so I do not know if there are other risks we have not even considered yet.

Best regards,
Niklas

Thanks for the feedback

This was the idea behind the additional mosfet 

But for the inrush control using LM5121 can you clarify ?

Updated reference design 

Hi Agxin,

Thanks for the clarification.
So your idea was to implement an ideal diode controller to block the current path.
This can indeed work, but I am not an expert on such circuits, so I cannot say if the most recent schematic with the capacitor between the FETs is sufficient or still needs further adjustment.

To give more information on the LM5121 device,
this device has an additional FET at the input side, which is turned off during shutdown to cut off the supply from the output.

The effect is the same as the ideal diode controller approach, as you also disconnect supply and output with a MOSFET.

Best regards,
Niklas