Tool/software:
Hi, TI.
Could you give me information about low limit value of Vf (two diodes) at comp pin?
The comp pin is connected to the emitter of a pnp transistor, the base of the pnp transistor is connected to the collector of another npn transistor, and the emitter is connected to GND.
In the above case, I want to confirm that the duty cycle is definitely zero.
If it is difficult to provide a guaranteed value, please provide it as reference information.250718_TI.pdf
Best, regards,
