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TPS1685: eFuse overcurrent protection doesn't work properly

Alexander De Geeter1
Prodigy 105 points
Part Number: TPS1685

Tool/software:

Hello,

For a redesign of a current board, we use 4 TPS1685 eFuse.

Our new boards just arrived, but during the validation we see that the overcurrentprotection (with blanking timer) doesn't work.

The short circuit protection works properly, so it's only the normal overcurrent protection that doesn't seems to work properly.

The strange thing is that the eFuse sees a overcurrent condition, when Imon becomes higher then Iref (1V).

The Itimer capacitor start discharging with a constant current source, but when the voltage at Itimer is decreased with ΔVITMR the FET isn't disabled.

According to the block diagram this should also reset the internal FET, the same way as the short circuit protection.

We double check the behavior with the TPS1685EVM, with this board the overcurrent protection seems to work fine.

We even soldered the same setting capacitors and resistors to the EVM board but there the overcurrent protection seems to work properly

Kind Regards

Alexander

  • 0
    TI__Guru* 79181 points

    Hi,

    What is the exact issue ? Can you share vin, vout, current and timer waveform?

    Regards 

    Kunal Goel

  • 0
    Prodigy 105 points

    Hello,

    The exact issue we have is that the overcurrent protection doesn`t seems to work.

    The IMON voltage is clearly higher then the voltage programmed at IREF, the 2uA sink is activated on the ITIMER capacitor.

    But for some reason the ΔVITMR isn`t detected by the eFuse, the capacitor keeps discharging until 0V but the FET isn`t turned off.

    Also when we short the Itimer capacitor to GND during normal operation, no reaction from the eFuse has been seen.

    This seems very strange to us, according to the block diagram this should also disable the internal FET the same way as with a short circuit.

    We adapted the EVM board to the same configuration (removal of extra efuse and update of programming capacitor/resistors), with this EVM board everything seems to work fine.

    Kind Regards

    Alexander

  • 0 in reply to Alexander De Geeter1
    TI__Guru* 79181 points

    Hi Alexander,

    How are you using PG pin? We have to ensure that you do not force PG pin low during turn on eFuse .This type of behavior can happen if PG was forced low during turn on. 

    Regards

    Kunal Goel

  • 0 in reply to Kunal Goel
    Prodigy 105 points

    Hello,

    We connect the powergood together with buck controller with a pullup.

    We didn`t know that this powergood is internally been used for some logic, we didn`t find anything in the datasheet or in the block diagram about this.

    Do you have extra information about this, is it only the normal overcurrent protection that is compromised?

    We just measured the behavior of the PGOOD pin during startup

    The first situation is when the eFuse is been powered with an low EN/UVLO.

    When the enable is high during the powerup of the eFuse

    Kind Regards

    Alexander

  • 0 in reply to Alexander De Geeter1
    Prodigy 105 points

    I just double checked the EVM board, if the PGOOD pin is shorted to GND we see the same behavior.

    This has been measured on the EVM board.

    Is it only this function which is affected by the pulldown of PGOOD?

  • 0 in reply to Alexander De Geeter1
    TI__Guru* 79181 points

    Hi Alexander,

    Also fast recovery will not happen after fault like recovery from OV. 

    Regards

    Kunal Goel

  • 0 in reply to Kunal Goel
    Prodigy 105 points

    Hello,

    Thanks for the feedback, the OVP pin is shorted to GND because we didn`t need this function.

    All the rest of the functionality should work correctly?

    Kind Regards

    Alexander

  • +1 in reply to Alexander De Geeter1
    TI__Guru* 79181 points

    Yes Alexander.  But my recommendation is to ensure that PG is not pulled externally logic low.

  • 0 in reply to Kunal Goel
    Prodigy 105 points

    Hello,

    Just another question, we don`t have any free microcontroller pins available to separate the PGOOD pins.

    Also the pin has a internal weak pullup to 5V, for our use case we want a pullup to 3.3V (which is 0V during eFuse startup).

    Therefore we want to add extra diode so the eFuse is only able to pull the line down, an external line shouldn`t be able to pull the PGOOD of the eFuse low.

    The open drain output of the buck controller is also attached to the PELT_PWRGOOD2 line.

    We only have no information about this internal pullup, just to be sure the leakage due the diode doesn`t affect the PGOOD level much.

    Is this the proper way to use the PGOOD pin of this eFuse?

    Kind Regards

    Alexander

  • 0 in reply to Alexander De Geeter1
    TI__Guru* 79181 points

    Hi,

    I will get back before tomorrow EOD.

    Regards

    Kunal Goel

  • +1 in reply to Kunal Goel
    TI__Guru* 79181 points

    Hi Alexander,

    This workaround looks fine to me.

    Regards

    Kunal Goel

  • 0 in reply to Kunal Goel
    Prodigy 105 points

    Hello,

    Thanks for the feedback!

    Kind regards

    Alexander