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HD3SS3220: RXP / TXP pin swapping

Part Number: HD3SS3220

Tool/software:

Hi Team,

I am working with one of my cusotmer & they have raised query related to TXP / RXP connections.

In data sheet for all the figures (DFP/UFP/DRP), TXP pins from connectors are connected to TXP pins of HD3SS3220 but in dongle EVMs these are not matching. DFP dongle is showing different connection.

refer below image.

there are other thread in forum exactly asking the same query & referring to response it is ok to connect either TXP or RXP of connectors to device but there is no clarity given how it works with swapped line? which register to set or how software or Hardware will detect?

  https://e2e.ti.com/support/interface-group/interface/f/interface-forum/823326/hd3ss3220-swapping-tx-rx-lines 

 Referrring to block diagram of device, only two controls are there, 1). Enable of Mux & 2) Direction of Mux, but block diagram or datasheet nowhere shing how RXP & TXP line can be swapped.

 

Can you help with the detailed description for these swapping of TXP & RXP, why it is needed & how to detect at software level? or what are the setting needs to do if swapped? Pls. note that I am not talking about the TX1P & TX1N line swapping, I am asking for the swapping of Pair (TXP & RXP).

Pls. help.

Mitesh

  • Hi Mitesh,

    These EVM's are a bit odd in terms of orientation, as they are meant to be placed between two cables, causing the routing of the TX/RX lanes to be different from a typical application. For the EVM's, sometimes the RX pins of one connector have to be connected to the TX of the other. This does not capture a typical application however.

    In a typical application, if you have the HD3SS3220 on the same board as your host for example, you can just route the TX pins of the SOC to the TX pins of the HD3SS3220, and the RX pins of the SOC to the RX pins of the HD3SS3220 like the application above. If the customer intends to use the HD3SS3220 in a dongle-like device, then the EVMs would be more applicable.

    For the HD3SS3220, yes, it is okay to route TX through the RX pins and RX through the TX pins of the mux, so long as the TX and RX lanes are correctly routed to the SOC and device. 

    The HD3SS3220 has no way of detecting when the TX/RX lanes are swapped, as the TX/RX lanes are part of a passive mux internally:

    Please let me know if you have any other questions or need further clarification.

    Thanks,

    Ryan

  • Ryan,

    I am still not able to get the messge from your explanation.

    My customer has host device is on board & we have no confustion on connection between host & HD3SS3220. We have a confusion on HD3SS3220 & USB connector.

    In case of DFP what should be the connection of TXP & RXP with connector, which diagram is correct?

    In case of UFP what should be the connection of TXP & RXP with connector, which diagram is correct?

    In case of DRP what should be the connection of TXP & RXP with connector, which diagram is correct?

    Mitesh

  • Hi Mitesh,

    In every scenario, TX1/2 P/N and RX1/2 P/N of the HD3SS3220 should connect to TX1/2 P/N and RX1/2 P/N of the USB connector respectively, assuming the TX/RX lanes of the host connect to the corresponding TX/RX pins of the HD3SS3220.

    Regardless of whether its DFP, UFP, or DRP, the TX of the host connects to the TX of the connector through the HD3SS3220, and vice versa. PORT orientation does not affect this.

    Please let me know if you have any other questions.

    Thanks,

    Ryan