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LMR14030-Q1: Any limitation of boot cap and resisitor?

Part Number: LMR14030-Q1

Tool/software:

Hi Expert,

To reduce the EMI noise, I would like to change boot cap from 0.1uF to 0.2uF. and consider to add 100ohm in series.

Do we have any limitation to place as boot circuit?

Regards,

Kotaro Yamashita

  • Hi Kotaro,

    It is not recommended to use higher Cboot other than suggested value in datasheet.

    Rather I would suggest using snubber circuit for that. Power Tips: Calculate an R-C snubber in seven steps

    Regards

    Arpita

  • Arpita,

    Thanks for your feedback. How's 0.1uF + 100ohm for boot? any recommendation or maximum limitation on Rboot?

    Regards,

    Kotaro Yamashita

  • Hi Kotaro,

    Calculating Rboot depends on several application factors like duty, frequency etc. Can you please share operating conditions

    In applications with short off times (high duty-cycle applications or high switching frequency), the boot capacitor cannot be fully charged in each cycle if the boot resistor is too large. 

    When the HS MOSFET is turned on, the current that flows from the bootstrap capacitor through RBOOT causes a drop in the voltage from the BOOT to SW pins. If this voltage drop is large, the voltage on the HS MOSFET gate-source is reduced, leading to potential slow device turn-on and or triggering the BOOT UVLO circuit.

    I would suggest determining the RBOOT, by starting at 0 and increasing the resistance until the desired ringing or EMI level is achieved. You can check with ~10ohm resistor if BST-UVLO is hit. Can you please capture SW node ringing with 0 ohm Rboot and 10ohm Rboot??

    Regards

    Arpita

  • Arpita,

    I'll follow-up this by email to you due to customer's design.

    Regards,

    Kotaro Yamashita