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TPS65994AE: Regarding EC control of TPS65994BF via I2C

Cho Lena
Prodigy 50 points
Part Number: TPS65994AE
Other Parts Discussed in Thread: TPS65994BF

Tool/software:

Hi, Sir,
Regarding EC control of the TPS65994BF, we have two questions:

1.Due to power-saving options, sometimes users need to cut off VBUS during sleep mode/hibernate mode/shutdown mode.
On our board, we cut the 5V power at the PP5V pin. However, when PP5V is turned off, the PD sends a reset signal to the retimer,
and the retimer reset causes the CPU to think that a device has been hot-plugged, leading to an unintended wake-up.
(we confirmed that if the reset from the PD to the retimer is disconnected, the system does not wake up automatically).

If the EC disables the PD (register is as below) via I2C before entering sleep/hibernate/shutdown mode,
will we avoid TPS65994BF sending the reset signal to the retimer after we cut off PP5V?


2.The customer is currently planning to implement USB3 Type-C only, but may support USB4 in the future. The BIOS has already disabled Thunderbolt functionality.
However, if the firmware is set to support Thunderbolt and a Thunderbolt cable is connected, the storage device will be identified as a PCIe device and cannot be recognized (since BIOS has disabled Thunderbolt support).

Can we set the firmware to support Thunderbolt, and then use the EC to configure TPS65994BF registers to disable Thunderbolt mode? If this is possible, how should we configure it?

Schematic is as below:

Thanks.

  • 0
    TI__Mastermind 31660 points

    Hi,

    Disable PD means disable the PD communication on CC line, not disabling the PD controller. If you want to disable the port of the PD controller, you can change the Type-C state machine to disable in the Port Configuration register 0x28.

    If you want to enable/disable USB4/TBT of the PD, you need to write 0 or 1 to the TBT mode enabled bit in TBT config register 0x52 and change the Tx Identity register 0x47 DFP VDO's USB4 capability bit.

    Regards

  • 0 in reply to Tommy Lin
    Prodigy 50 points

    Hi, Tommy,
    1. If EC sets register 0x28[1-0] to 3h to disable Type-C state machine and then cuts off PP5V in shutdown mode.
    The system powers on again, will the PD begin communicating with the device via CC when EC re-enable Type-C state machine bit?
    Are there any timing requirements when setting Type-C state machine bit back to 2h?

    2. May I confirm with you that the TBT mode enabled bit is the one shown in the picture below?



    I couldn't find VDO's USB4 capability bit at 0x47. Could you please point out which bit it is in the below table?

    Thanks.

  • 0 in reply to Cho Lena
    TI__Mastermind 31660 points

    There are no strict timing requirement on changing the Type-C state machine bit back to DRP after system power is back on, but I recommend doing so as soon as PP5V is ready.

    Cho Lena said:
    2. May I confirm with you that the TBT mode enabled bit is the one shown in the picture below?

    Yes that is correct

    Cho Lena said:
    I couldn't find VDO's USB4 capability bit at 0x47. Could you please point out which bit it is in the below table?

    You need to decode the DFP VDO 2. The TX identity VDO numbers are based on the product type. You can find this in the GUI

  • 0 in reply to Tommy Lin
    Prodigy 50 points

    Hi, Tommy,

    Does "change the DFP VDO's USB4 capability bit" mean deselecting the USB4 button as shown in the image below?


    Since we prefer not to modify FW and want to use EC to change the register instead, is it possible to change the DFP VDO's USB4 capability bit by using EC?

    The customer currently wants to use the USB3 interface but plans to support USB4 in the future.
    Can the PD firmware be updated by the user through EFI or Windows (like BIOS)?

  • 0 in reply to Cho Lena
    TI__Mastermind 31660 points
    Cho Lena said:
    Since we prefer not to modify FW and want to use EC to change the register instead, is it possible to change the DFP VDO's USB4 capability bit by using EC?

    Yes they can use EC to dynamically enable/disable the USB4 capability bit. But keep in mind every time the PD experience POR the FW reloads and the bit will go back to the original setting you have.

    PDFW can be updated via EFI but they need to develop the EFI code themselves. 

  • 0 in reply to Tommy Lin
    Prodigy 50 points


    Hi, Tommy,
    Thank you for the reminder about regarding that the FW reloads when PD experiences POR.

    We want to use EC to dynamically enable/disable the USB4 capability bit.
    But I’m still not sure which bit in the Tx Identity register 0x47 needs to be modified.
    Could you please let me know which bit in register 0x47 corresponds to the USB4 capability bit you mentioned in the GUI?

  • +1 in reply to Cho Lena
    TI__Mastermind 31660 points

    The TX identity register grows depending on the number of PDOs you put in. You can go to the raw view in the GUI to find out the USB4 capability bit