TUSB1046A-DCI: TUSB1046A + TPS65987 schematic review

Henry yu

Part Number: TUSB1046A-DCI
Other Parts Discussed in Thread: TPS65987

Tool/software:

Hi Ti team,

We have the TUSB1046A + TPS65987 schematic,

Could you help review our schematic? This schematic is paired with the platforms Intel Twin Lake-N or Intel Panther Lake-H

I can send the schematic file via private message.

Thanks

Henry

1 month ago

0 Vishesh Pithadiya 1 month ago

TI__Mastermind 38485 points

Hi Henry,

Please send the schematic to me. I have requested friendship on E2E so we can PM.

0 Ryan Kitto 1 month ago in reply to Vishesh Pithadiya

TI__Mastermind 37170 points

Hi Henry,

Please send the schematic to me as well. For a review of the TPS65987, please submit the relevant section of the schematic to the relevant team under that device name, as our team does not cover that device.

Thanks,

Ryan

0 Ryan Kitto 1 month ago in reply to Ryan Kitto

TI__Mastermind 37170 points

Hi Henry,

For AC caps, there should only be 100nF caps on the TX1/2 P/N, SSRX, and SSTX lanes. RX1/2 P/N does not need caps, these should be removed.

I2C_EN is pulled up for 3.3 I2C. Looks like I2C is pulled up accordingly.

All EQ pins are pulled-down for default levels of 0 for EQ at start-up. These levels can be adjusted via I2C:

Otherwise, I don't have any other notes.

Thanks,

Ryan

0 Henry yu 1 month ago in reply to Ryan Kitto

Prodigy 40 points

Hi Ryan,

Thanks for your help!

Could you also review our layout? I can send the layout to you via private message.

Thanks

Henry

0 Ryan Kitto 1 month ago in reply to Henry yu

TI__Mastermind 37170 points

Hi Henry,

Yes, we can also review the layout. Feel free to PM that as well.

Thanks,

Ryan

0 Ryan Kitto 1 month ago in reply to Ryan Kitto

TI__Mastermind 37170 points

Hi Henry,

Your layout looks good, though I did notice that it seems like this is just a small snippet of the layout. Because of that, it's hard to tell whether the trace looks good the full way through. If possible, could I get the layout with the full USB3 TX/RX and DP traces so I can confirm?

Thanks,

Ryan

0 Henry yu 30 days ago in reply to Ryan Kitto

Prodigy 40 points

Hi Ryan,

Thanks for you support!

I can check the USB3 TX/RX and DP traces myself.

BTW, totally we have two layout files (one project has two SKUs), one has already been reviewed by you, and the other I will provide a bit later.

Thanks

Henry

0 Ryan Kitto 30 days ago in reply to Henry yu

TI__Mastermind 37170 points

Hi Henry,

Sounds good. Please just ensure the signal traces are length matched and routed differentially all the way through to the connectors. Let me know when you have the other layout.

Thanks,

Ryan

0 Henry yu 2 days ago in reply to Ryan Kitto

Prodigy 40 points

Hi Ryan,

Sorry for the late reply, I have sent the other layout file to you via private message.

Please help review.

Thanks

Henry

0 Ryan Kitto 2 days ago in reply to Henry yu

TI__Mastermind 37170 points

Hi Henry,

I will review this layout and try to get back to you by EOD tomorrow, 9/10.

Thanks,

Ryan

+1 Ryan Kitto 1 day ago in reply to Ryan Kitto

TI__Mastermind 37170 points

Hi Henry,

Looks like multiple signals turn 180 degrees at a via. We strongly recommend against this, as this can cause reflections in the signal. If possible, we recommend straightening these signals out at the via to avoid these reflections and improve signal quality.

Please ensure the intra-pair skew is kept as low as possible as well.

Then overall for the signal path between the SOC and the redriver, it looks like there are a lot of curves and large detours in the signal path. If possible, we recommend keeping the signal as straight as possible for layout designs, only curving as needed. Is there a reason the customer has these many curves?

Thanks,

Ryan

0 Henry yu 19 hours ago in reply to Ryan Kitto

Prodigy 40 points

Hi Ryan,

Thanks for you great help!

Thanks

Henry

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TUSB1046A-DCI: TUSB1046A + TPS65987 schematic review