TPS4811-Q1: Internal pull down resistor value at INP pin.

Hi Nakagawa,

The INP pin drives the gate of the FET. When the INP pin is left floating, INP has an internal pull-down to GND to keep PD pulled to SRC. So, when VCC for example 5V is on and higher than the minimum for the pin to be considered logic high, then the pin is on. If VCC is low, then INP is low. 

I will check on the internal pull-down value.

Thanks,

Rishika Patel 

Hi, Rishika,

Thank you for this cooperation.  Unfortunately, I can't put my circuit diagram on this format but my design put 10k resister at INP as pull-up resister. So, my image is to drive external FET, gate drive, even though the input signal is not connected at INP. However, this IC does not drive and I don't understand the reason.

I have two miss-designs,

1) One is to use 0.1uF at 10pin, bypass cap at "DIODE", this value is used 1000pF at this evaluation board's circuit diagram. 

2) Next, P36 at this datasheet, figure 9-18, Cscp is put 1nF at Iscp/CS-. And, I missed, put 1nF at Iscp/GND. 

I don' know why these don't work. Please advise me whether the above mistaking are anything reason to not drive.

Best regards,

Nakagawa 

Also, please advise me that, when we don't use remote temp sense function, can I open at DIODE? Or, anything to add?

Best regards,

Nakagawa 

Hi Nakagawa,

If you do not want to use the overtemperature function, connect the diode pin to ground. 

I will take a look at the schematic and get back to you.

Thanks,

Rishika Patel