always thanks for your kindly answer
our customer did request the Tj by calculate on set condition.
& request the review the below PIC as attched.
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always thanks for your kindly answer
our customer did request the Tj by calculate on set condition.
& request the review the below PIC as attched.
Your calculations are correct if the customer board results in the ThetaJA being equal to the ThetaJA of a JEDEC thermal test board. Their actual ThetaJA will be different. The website, www.ti.com/thermal, has a link to the PCB Thermal Calculator that will help calculate an ICs tempeature rise based on package, power dissipation, and amount of copper on the PWB. If it does not have a model for the exact IC needed, you can use the calculations for another IC in the same package. The customer's use of a resistor in front of the linear regulator is a good way to spread out the power dissipation on the board and reduced the power dissipation and temperature rise of the linear regulator.
dear Michael
thanks for quickly replay, it's very good help for me...
we have more request.
" UA78L05AIPK " device has the Curve by " Pd by Temp. " ...?
we want review the curve by " Pd by Temp. ",
because our application is industrial product....so our TEST reference is very tough.
so i hope get help from you...
thanks...
The datasheet does not have the curve you are asking for. However, the curve you are asking for is easily found by graphing the equation
Temp_junction = Temp_ambient + (Power_dissipation*ThetaJA)
The thermal parameters for this IC can be found in the datasheet's "package thermal data" paragraph.
every ine thanks for kindly teach...
very thanks...yours guide was great helpful to me...
below is another question & request.
pls give the help. now is almost done....pls~
1. Theta j-a value on Low K(2-layer)
(if want show Pd, it'sneed high K condition)
2. Pd curve by temp.
pls immediately give the answer...
Lee,
We do not have exact data on the Theta j-a and Theta j-c values for the SOT-89 (PK) package with Low-K type boards, but I can give you some good approximations of what you should see.
The Theta j-a value for SOT-89 (PK) package with the Low-K type boards will be almost twice (2x) the values of the High-K boards. In this case (Sot-89-PK) you should see a Theta j-a value of ~104C/W (2x Theta j-a value for High-K). The only way to exactly verify this is through testing of your PCB.
The Theta j-c value for the SOT-89 (PK) package with the Low-K boards will be ~15% larger than the value in the data sheet for High-K boards. Thus the value for Theta j-c would be ~10.6C/W for a Low-K type board. Once again you will have to verify this through direct testing of your PCB.
Please let me know if you have further questions.
Richard Elmquist
thanks Richard & happy new year...
how about Pd curve by temp of sot-89 package, like as below question.
2. Pd curve by temp.
thanks Richard
now let's change the question....
package was changed to UA78M08QDCYRQ1 (SOT-223 (DCY)) by customer want.
we find out the some technical document in the Nationl Web site for Pd analysis & Theta j-a curve on high-K PCB condition & also Low-K PCB condition.
can we use this document data ?
pls see the refer below link.
1. Literature Number: SNVA036A : http://www.ti.com/lit/an/snva036a/snva036a.pdf
--. this document show the Pd analysis & Theta j-a curve on high-K PCB condition & also Low-K PCB condition of SOT-223 package
2. Literature Number: SNVS225F : http://www.ti.com/lit/ds/snvs225f/snvs225f.pdf
--. this document show the Pd analysis & Theta j-a curve on high-K PCB condition & also Low-K PCB condition of SOT-223 package
Lee,
These application notes are relevent if you are using the SOT-223 package, but they do not directly relate to High-K or Low-K boards. Figures 3 and 4 in the SNVA036A are measured with a 2 oz copper clad PCB. Figure 3, 4 and 5 in the SNVS225F are based on 1 oz of copper. These are different measurements and are relevent as long as your PCB is based on these type board configurations. The emphasis of these application notes was to show how the size and placement copper pads can improve the thermal performance of the IC.
The EIA/JEDIC standard (which TI employs) uses:
A 1s (single signal layer) configuration gives a typical usage value for a moderately populated, multi-plane system level PCB application. A 2s2p (double signal layer, double buried power plane) configuration gives a best case performance estimate assuming a sparsely populated, high trace density board design with buried power and ground planes. (from "IC Thermal Metrics" SPRA953A http://www.ti.com/lit/an/spra953a/spra953a.pdf page 3/ This is a great resource to understand how TI defines their use of thermal specifications).
Here are the specifics of the JEDIC High-K and Low-K test boards:
This is not the exact same specification as was done in the testing used for the two application notes cited above.
If you use a PCB design with similar copper planes as described in the application reports, you will see similar results.
It is very important to remember that these numbers (Theta j-a etc.) are given as guides to help in your design. They will help you to estimate the thermal performance of your device. Your actual results will depend on many different factors. If you are using a board similar to the one described in the chart above as High-K you should expect to have similar results in your testing. Your thermal testing of the final PCB design is the only way to validate your estimates.
Please read the "IC Thermal Metric" application report as it details the factors that will effect the thermal performance of your PCB and will help you to design a PCB that will give you the necessary thermal performance.
Please let me know if you have further questions.
Richard Elmquist