LM3150: 3V3 Rail Won't Turn on

Hello,

The gate traces look very thin. Those should be made wider to accommodate the current needed to drive the FETs. 

How large is the ESR of your output capacitance? You may need a Cff cap. Refer to the applications section of the datasheet for the comparison criteria.

Can you share the parts of the layout which show the controller IC?

Best regards.

Ridge

Ok what do you think about a 0.15mm thick trace to the gate? The NMOS I am using is the SIR462DP-T1-GE3 from Vishay Dale. It has a gate charge of 30nC. I am calculating some fairly high currents from my rough I = Qg / t estimates... but it would be a very short duration? Is that the problem?

The 150uF Caps have an ESR of roughly 26mOhm, so 2 in parallel is 13mOhm. They are the 875575344003 from Wurth Electronics. I saw the note about Cff. Do you think that is needed? Tomorrow I will probe the lines with my oscilloscope to see the signals to get some more information.

Here is a picture of the layout for the controller.

Hello,

You should try with a Cff.

Also, yes the currents are for a short time, but the thicker traces will reduce the inductance in the trace for a cleaner signal path to the FET.

I typically recommend 10mil  (~0.25mm) for the gate drive signals.

When you can measure waveforms please prioritize the following:

• Vin
• Vsw
• Vfb
• Vout (if there is an output measured on a DMM)
• VCC of the device (pin 1)

Best regards,

Ridge

Hey guys, 2 updates from last night. I added a Cff of 220pF (0402) in parallel with R413. That didn't immediately work... But then I took a look at the fets underneath the microscope and it appeared that the solder on the source of my high side fet and drain of my low side fet didn't actually melt! They were too well thermally connected to the planes below. I hit it with a significant amount of heat, as well as a soldering iron and I was able to capture good results last night with no load. I saw 3.3V output. This morning I powered it up for a few minutes and now it's not working again and I'm measuring 0.6V.

So firstly, the results from last night with no load (open)

VCC (AC Coupled):

VCCC (AC Coupled):

When I measured VCC and VCCC using DC coupling I did see that they were at 20V DC. But I was interested in looking at the noise. And from these plots I do see that there is some noise around 187MHz on the input capacitor. 

SW (DC Coupled):

The device seems to be switching at around 405MHz.

Vout (DC Coupled):

And here is my "3.3V" output. Oscilloscope is measuring it to be 2.74V, but my multimeter measured 3.3V.

Now, this morning I was doing some more testing and the output from my multimeter is now reading 0.6V. From reading the datasheet this may actually still be "working" its just that the FB pin isn't going below 0.6V? I am also still able to see the 5.95V on Pin1.

Do I need to add a DC load? The problem with that is that the only circuit powered from this 3.3V rail is my H-bridge driver, with a pair of large coils which I will be controlling with my firmware and it will have "off" periods.

The device should be able to regulate a no load. 

Is there a ground plane flooded on the top layer of the PCB? How are the grounds set up on the inner layers of the PCB?

Also, can you provide an image of the physical board and the test setup?

Best regards,

Ridge

Hey Ridge,

There are ground pours on the top layer connected to my output caps (C402 and C419). 

Here is the top layer:

I have a solid GND layer on layer 2.

It's a 6 layer board and I have another solid GND layer on layer 5.

My input capacitors are directly below the regulator (U403) on the bottom layer (layer 6). The regulator sits above them similar to how I have drawn it here:

The physical board looks like this (Sorry for the crappy quality). I tried to label things as best I could.

What should I test next?

Hello,

Thank you for sharing additional images of the layout.

The board does not appear to have large GND pours on the top layer, so the return paths are all travelling through the inner layers for the high dv/dt loops of the device. 

The ground connection to the IC itself is also minimal with just the 3 vias.

Also, based on a previous post, it seems that soldering is also a potential issue. Have you checked that the other FET and the device are properly soldered to the board?

If the device is regulating to the 0.6V reference, it is possible the bottom feedback resistor is damaged or not soldered properly or could have been incidentally reflowed while applying heat to other components.

Best regards,

Ridge

Hello Ridge,

I see the mistake you are pointing out. Here at the bottom of the low side fet I have only 1 via:

A solution I may try is adding a solder bridge to connect this fet to the nearby capacitor to improve this path.

I really tried to reflow the fets as they are what I noticed were not soldered properly. I still question these connections:

The feedback resistor is soldered fine.

Tonight I took some more measurements. With an oscilloscope that couldn't measure 20V so I had to use AC coupling for the switch node and VCC / VCCC rails.

I see 83kHz switching noise on the VCCC and SW nodes:
Here is VCCC:

Here is SW:

And here is VOUT again:

on all three, as well as my 20V rail, I am seeing a 250KHz noise, I think this must be from something else?

I will try again to reflow the fets. Then I will add the solder bridge I think the low side fet is the worst location out of all my layout issues. Then if those don't work I will try to replace the fets with new ones?

Do you have any other suggestions?

Hello,

The noise you are seeing looks to be a result of the measurement technique. Make sure that you are using the tip and barrel method to avoid noise spikes getting coupled into the measurement.

Is the device now regulating properly? Please include a summary of what the issues with the circuit still are in the next post.

Best regards,

Ridge

Hello Ridge,

I went through every part again. replacing them -by-1... should have started with R413 because after I fixed that I have 3v3 again!!!

I had the device on for 20 mins with no load and then I saw smoke!!!

I couldn't tell where exactly it was... the whole area from the screenshots I've been sending was fairly hot to the touch... BUT that is definitely the problem!!

Tomorrow I will add wires here:

And here:

Hi Parker,

Those traces for the gate drivers are very thin and may not be adequate to carry the currents.

Also, the limited grounding on the top layer will be thermally challenging for the device. Without proper heat sinking from the top layer GND plane, the device may be over stressed thermally.

I recommend making our suggested change to the layout. In the meantime, you can order an EVM on the product folder and test your design on that board: https://www.ti.com/product/LM3150

Best regards,

Ridge

I definitely will be if this prototype gets any headway and I have the opportunity to make a RV02!

This DC DC converter is for a pretty neat 100W USB-C project I am working on!

thanks!