Tool/software:
Hello everyone,
I'm currently working with the LMG2650EVM-100 in a buck configuration, and I'm trying to get a replica of the low-side FET current on the CS pin.
As expected in a buck topology, the LS FET current should follow a decreasing ramp during its on-time. However, the signal I observe on the CS output does not reflect this behavior. Instead of a decreasing ramp, the signal appears flat or even increasing, which is quite unexpected.
Additionally, I should mention that I'm operating the buck in Forced Continuous Conduction Mode (FCCM). This means the LS FET current becomes negative toward the end of its on-phase. While I don’t expect the CS pin to replicate the negative portion of the current, I do expect it to accurately reflect the positive part — but this doesn’t seem to be happening.
One possible explanation I have is that the CS emulation circuitry might only work correctly with an increasing current ramp. Perhaps there's additional internal circuitry designed to generate an "artificial current-sense emulation signal" during fault conditions, and this might interfere with proper emulation when the current ramp is decreasing.
Does this sound plausible? Or could I be overlooking something in my setup?
Thanks in advance for your insights!
Best regards,
Jo
