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LM5185-Q1: LM5185-Q1: Voltage dips to 0V on the input side for 150mS, the 5V DC output is not interrupted by the dip on the input side

Jignesh Karena
Prodigy 25 points
Part Number: LM5185-Q1

Tool/software:

Hello Team,

We want to use LM5185-Q1 part in our design.

Our design criteria is as below

Input voltage range = 9V to 60V DC

Output = 5V (2.5A) DC

Isolation = 6KV

Note : Important point is that when the voltage dips to 0V on the input side for 150mS, the 5V DC output is not interrupted by the dip on the input side.

Request to provide design guide-line as per above inputs.

Thanks & Regards,

Jignesh Karena

  • 0
    TI__Genius 15606 points

    Jignesh.

    I will be back to you tomorrow with this request.

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 25 points

      

    Can you please check this and provide your inputs as soon as possible.

    Thank You

  • 0 in reply to Jignesh Karena
    TI__Genius 15606 points

    Jignesh,

    LM5185-Q1 has an UVLO pin, which comes from VIN supply. If UVLO<1.45V, the device will stop switching and regulating and Vout will shutdown (decrease to 0). 150ms is long enough for this to happen. 

    Is it possible that VIN decreases not to 0V but to a VIN_min voltage so that UVLO>1.45V? If that is the case, the device will still switching and regulating (Vout will have some transient response but it will not shutdown).

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 25 points

    Hello  ,

    Thank for this valuable guidance.

    Can you please provide design guideline as I mentioned design requirements.

    Or any other solutions which are better than this? If yes, please provide your valuable suggestion.

  • 0 in reply to Jignesh Karena
    TI__Mastermind 25980 points

    Hi,

    The team is out of office today on U.S. holiday. We will get back to you soon.

    Thank you for your patience.

    Regards,

    Max Verboncoeur

  • 0 in reply to Jignesh Karena
    TI__Genius 15606 points

    Jignesh,

    I recommend two possible options:

    1. If UVLO comes from VINP supply. VINP cannot go to 0V because the device will stop switching and it will shutdown as EN/UVLO<1.45V (falling threshold UVLO_OFF). I recommend decreasing VINP to VIN_min (not to 0V) operation so that EN/UVLO is always higher than designing resistor divider from VINP to UVLO so that EN/UVLO is always higher than >1.48V (including tolerances). Please, see equations below from DS to design resistor divider. Select VIN_on and VIN_off so that 1.48V<Vin_off<Vin_on<VIN_min

    2. If you have the option of using an external bias supply voltage (e.g coming from an MCU), then no resistor divider is needed and you can connect MCU bias voltage (+3.3V/5V typical values) directly to EN/UVLO pin. For the 150ms VINP transient event, please use a value higher than 0V. I recommend using a VIN_min voltage so that the device is able to deliver a min of power (e.g 4V).

    As you can see, on both cases it is recommended keeping a VIN_min voltage of operation. If VIN is completely shutdown to 0V, the device wont have any power to switch and deliver to the secondary side, which means that Vout will shutdown eventually during the 150ms transition.

    Finally, please use the Calculator Design tool for your schematic review. Link is here LM5185-Q1 data sheet, product information and support | TI.com

    Thank you