Other Parts Discussed in Thread: LM5176
Tool/software:
Hi all,
In the LM5176-Q1 there is overcurrent protection. It senses the voltage across CS/CSG.
In our design this is used in combination with hiccup mode.
We have verified that these functions work in our design. e.g. when using a short at the output causes CS/CSG to rise and SS to be pulled down.
However, when testing what happens in buck-mode when HDRV1-FET is shorted, there is no cycle-by-cycle limitation performed and no hiccup mode entry.
My hypothesis is that CS/CSG in buck mode expects current from GND to the load. When HDRV1-FET is shorted, instead current flows from source to GND.
The polarity of CS/CSG voltage is reverse and thus there is no overcurrent detected. The threshold is never reached.
Is my reasoning correct? Or should LM5176-Q1 detect this fault also?
Kind regards,
Joey