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UCC28070: VAO stuck at 0V even if SS pin finished ramping.

HAREL LEVY
Prodigy 240 points
Part Number: UCC28070

Tool/software:

Hi Everyone,

We are using UCC28070 for a boost PFC and I have a strange issue - from a certain input voltage the chip does not PWM and VAO is stuck at 0V:

Input Voltage Range - 170Vrms ~ 528Vrms (VINAC gain is 1/217 V/V)

Output Voltage - 800V (VSENSE gain is 1/266 V/V)

Up to input voltage of 524Vrms (741V on the output since its a boost) the chip is able to start-up, SS is ramping up and output voltage follows up to 800V, at 525Vrms SS still ramping up but VAO is stuck at 0V so output voltage does not rise to 800V.

What we tried:

- We checked 6V VREF - its good.

- We though maybe at higher input voltage something is happening with VINAC so we decreased the VINAC gain so VINAC will be lower but it did not fix the issue.

- We though maybe at this output level VSENSE is 2.8V so maybe it was something with the slew-rate correction so we decreased the gain of VSENSE so it will be below 2.8V before start-up but it also did not fix the issue.

- We have nothing to pull down the VAO (except for the feedback resistor and capacitors) so it must be something internally.

- If we apply input voltage >525Vrms and then decrease to 520Vrms the Chip does turn on and output voltage ramp up and if we increase input voltage back to >525Vrms the chip still operated and working (VAO does not go down to 0V).

1. Is there any special reason why at certain input voltage the UCC will not boot up (even though SS did finish ramping, and 6V Vref is good)?

2. What even more strange is some units are able to turn on while some units does not.

Your help is highly appreciated and needed.

Thank you.

  • 0
    TI__Mastermind 40520 points

    Hello Harel,

    This is not expected behavior for the UCC28070.  
    1.  No, there is no special reason for a certain input voltage to not "boot up" the UCC.
    2.  If it is not consistent, it indicates either a marginal condition or possibly variable noise levels at some input. 

    For VAO to stay low while SS is high, it requires the VSENSE input voltage to be >3V (which would drive the VAO output low).  

    When you say VSENSE is 2.8V at 524Vrms input, is this a measured value or inferred by calculation of the 1/266 divider? 
    If the voltage is inferred not actually measured, then it is possible that VSENSE > 3V if there is leakage current around the upper VSENSE-divider resistors. 
    Given the high voltage involved (>741V), such a leakage current can develop through contamination on the PCB surface near/around the upper resistors which effectively reduces their nominal resistance and makes VSENSE "see" and OV condition. 
    Please clean the PCB of any flux residue or other surface contamination around the VSENSE and VINAC divider strings. 

    Regards,

    Ulrich