• State Resolved
  • Replies 8 replies
  • Answers 3 answers
  • Subscribers 63 subscribers
  • Views 90 views
  • Users 0 members are here
Support feedback
Options
Options
Related

LM74930-Q1: Spice model plus reverse polarity fail

Zenon Tofil
Prodigy 30 points
Part Number: LM74930-Q1
Other Parts Discussed in Thread: TPS798-Q1

Tool/software:

Hello,

1.0 Is there a plan to have Spice model compatible with Pspice? The latest model does not work, Pspice  is looking for a Sleep pin which is not in the model? I have tried importing to LTspice but it seems the SW does complain about missing quotes and does not recognize some of the brackets. Any guideline on how to fix it?

2.0 Is grounding the exposed pad make is the main cause of reverse polarity failure? Can you apply -24 V to mode/En pins? 

Regards,

Zenon

  • 0
    TI__Mastermind 47835 points

    Hi Zenon,

    1. Unfortunately, the spice model is not compatible to other softwares. Only full version of Orcad Pspice is suitable for this IC. No plans to extend it to other softwares as of now.

    2. Grounding the exposed pad will cause failure of reverse polarity. Yes, -24V can be applied to MODE/EN.

    Please adhere to these ratings.

    Regards,

    Shiven Dhir

  • 0
    Prodigy 30 points

    Shiven Dhir,

    Thank you for your response. assuming that will disconnect RTN pin and change the LDO to the one with reverse polarity protection. Do you see anything wrong with attached schematic. Note the input voltage range is 20-32V, running a 7A max, 5 A typical. The circuit must withstand reverse polarity from external DC supply or battery as well as transients of up to 200 V.

    Regards

    Zenon

  • 0 in reply to Zenon Tofil
    TI__Mastermind 47835 points

    Hi Zenon,

    I am assuming you have left FLTB floating. Yes, the schematic is fine.

    Regards,

    Shiven Dhir

  • 0
    Prodigy 30 points

    Shiven Dhir,

    Going back to my first question. I want to make sure I understand the model issue. This is a complex IC and TI provide a model and free Pspice tool that cannot simulate this model? Is that correct? Is so I am going to have to design this IC out to reduce the risk. 

  • 0 in reply to Zenon Tofil
    TI__Mastermind 47835 points

    Hi Zenon,

    Specifically this family of our device (LM749xx) doesnt work on free tool. We regret the inconvenience. You can get our EVM to evaluate the device as well.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 30 points

    Thank you, Shiven Dhir,

    Looks like I will have to get an eval board. Few more questions about LM 74930:

    1. Can EN and MODE pins be tied to VS while IC is subjected to reverse polarity test?

    2. I presume DZ1 in Figure 8-1 is to prevent VGS overvoltage of Q1. Also, what is the power rating of Schottky diode on V_out of Figure 8-14? 

    3. Is there concern with max VGS of Q2?

    4. In case of high peak transient pulses R1 in Figure 8-14 might get stressed excessively, can I replace it with BSS126 E6906?

    5. I am using low current LDO for the external ON/OFF switch, in case answer to item 4 is yes, can I tie the LDO input to VS? I am planning to use LM2936HV or TPS798-Q1.

    Regards,

    Zenon

  • +1 in reply to Zenon Tofil
    TI__Mastermind 47835 points

    Hi Zenon,

    1. Yes.

    2. Understanding is correct; The output diode is present for representation purposes. The power rating depends on system use case. For reference, our EVM uses an SMA diode.

    3. For extra protection, zener can be added. Although we don't generally add it.

    4. Incases of transient's pulses, R1 cannot get damaged. It has to be scaled considering all then corner cases. For that reason, we recommend 1206 package.

    5. Resistor will not get stressed.

    Regards,

    Shiven Dhir

  • 0 in reply to Shiven Dhir
    Prodigy 30 points

    Thank you, Shiven Dhir