TPS650332-Q1: PSRR measurement procedure

Part Number: TPS650332-Q1

Tool/software:

How to validate the PSRR of LDO in this PMIC.

You have mentioned high LDO PSRR which is <-18dB approx. in the datasheet.

I have tried out the following procedure:

Scenario 1:

unlock
02 DD 91 #unlock the control registers
05 AA B8 #unlock the configuration registers
04 1A B4

sequence elimination
0D 3F F2
0E 3F CD
0F 3F D8
10 3F 4C
11 3F 59

03 1d ca  - 4V Off

Connect Bode 100 as per the below circuit and gave ext supply as 4Vin to LDO via Line injector.

No output at LDO as NRST is low.

Scenario 2: Gave external voltage to LDO output in addition to scenario 1.

Is the procedure followed correctly?

Are we missing any commands?

What will be the passing criteria for LDO PSRR? (Vin:4V, Vout:3V3)

Kindly guide us.

  • Hello, Sivaranjani,

      TPS650332-Q1 is a GPN; please provide an OPN (Orderable Part Number) by which I can tell its configuration details. 

      LDO PSRR measurement needs the LDO works with output from its input instead of supplying external voltage to LDO output. Vin:4V, Vout:3V3 is ok. 

      Please try to use the procedure below with CRC byte added:

        write('DEV_STAT', 0x7);
        write('CONTROL_LOCK', 0xdd);
        write('DEV_STAT', 0x3);
        write('CONFIG_LOCK', 0xaa);
        write('BUCK_LDO_CTRL', 0x1b);
        write('BUCK_LDO_CTRL', 0x13);
        write('BUCK_LDO_CTRL', 0x11)

         After above sequence done; then disconnect LDO VIN from VBUCK1 and supplying external voltage to LDO input pin; and check the LDO output; it should have 3.3V output.

    Thanks!

    Phil

  • Hello Phil, 

    We are using TPS6503321MCRGERQ1 PMIC

    Regards,

    Siva

  • Hi Siva,

      Please follow the steps below for LDO PSRR measurements:

    1. Supply external liner power supply for LDO input with at least 0.5V Vdrop.
    2. Run attached script to turn off all 3 bucks.
    3. Measure the LDO output to make sure it's regulated from LDO input.  

    function main() {
    	write('DEV_STAT', 0x7);
    	write('CONTROL_LOCK', 0xdd);
    	write('DEV_STAT', 0x3);
    	write('CONFIG_LOCK', 0xaa);
    	write('SEQ_TRIG_LDO', 0x1f);
    	write('BUCK_LDO_CTRL', 0x1d);
    }

    Thanks!

    Phil

  • Hello Phil,

    Thank you for the support, the steps suggested were working fine.

    Attached the results here (tests were performed on Direct connect and Pigtail Camera Board).

    Could you please provide the passing criteria for PSRR in this LDO 

    LDO spec : Vin 4V, Vout 3V3, Load 35~50mA

    DC Camera

    PT Camera

    Thanks and regards,

    Sivaranjani.K

  • Hi Siva,

      We don't give specs for LDO PSRR, but attached below is our bench test data for customers review and check if it meets their specified specs. 

    Thanks!

    Phil

  • Thank you Phil

  • Hi Phil,

     We are getting PSRR value of -2.4dB, is it acceptable?

    Thanks and regards,

    Sivaranjani

  • Hi Siva,

       Can remesure with the same settings from the screenshot below?

    Thanks!

    Phil

  • Hi Phil,

    Remeasured using same settings.

    remeasured using old setting

    what's the tolerance value for the spec?

    Regards,

    Sivaranjani

  • Hi Sivaranjani,

      The PMIC device doesn't specify the PSRR value since there are many variants having impact to the measurements but also it depends on system requrements; like the sensor's sensitivity to the LDO noise. 

      According to our test, it's about -70dB at 1K; -63dB at 10K and -47dB at 100K; and the meaurements on your side is worse than ours. 

    Thanks!

    Phil