TPS65988: Boot Configuration 3

Part Number: TPS65988

Tool/software:

Hello,

I want to use the TPS65988 in my design and I'm wondering on how to configure the boot mode. This is the usecase I need to implement:

1st time the system is powered ON (the flash memory is empty):

  • The controller is powered either from VIN_3V3 (from system) or from VBUS1/2 (20V/3A capability)
  • The host (Com-Express) drives the controller through I²C bus to flash the memory using the SPI bus

Every other time the system is powered ON (the flash memory is not empty):

  • The controller is powered either from VIN_3V3 (from system) or from VBUS1/2 (20V/3A capability)
  • The controller boots from the flash memory

1. From the controller datasheet, I understand I need to set the Configuration 3 (describes in Table 8-9), is that correct?

2. According to Table 8-7, to set Configuration 3, I need a low level on SPI_POCI. But to implement the SPI bus between the controller and the flash memory, I need a pull-up on SPI_POCI. I see a conflict here, what do you recommend?

3. On the first time the system is powered ON, is it possible to configure one GPIO through I²C in order to drives the WP (write protect) to allow the flashing process?

  • Hi Ambroise, 

    Looking into this and will provide feedback by tomorrow. 

    Thanks and Regards,

    Raymond Lin

  • Hi Raymond,
    Thank you for looking into this, let me know if you need more information about my design.

  • Hi,

    Raymond is currently out of office. Please allow for some delay in responses. 

    Best Regards, 

    Aya Khedr 

  • Hi Ambroise, 

    Apologies for the delayed response, please see my feedback below:

    1. From the controller datasheet, I understand I need to set the Configuration 3 (describes in Table 8-9), is that correct?

    In order to allow VBUS to negotiate up to 20V and for the power switch to be closed while the PD is loading the configuration from the SPI flash, Configuration 3 will work in this scenario. 

    2. According to Table 8-7, to set Configuration 3, I need a low level on SPI_POCI. But to implement the SPI bus between the controller and the flash memory, I need a pull-up on SPI_POCI. I see a conflict here, what do you recommend?

    The low level is used to indicate to TPS65988 during the boot sequence what the default configuration (i.e. Configuration 3) is set to and not the same thing as normal SPI communication operation. 

    To set the BP_NoWait and Configuration 3 settings, you'll need to add a pull-down resistor (i.e. 10kOhm) on the SPI_POCI line to indicate this mode. 

    3. On the first time the system is powered ON, is it possible to configure one GPIO through I²C in order to drives the WP (write protect) to allow the flashing process?

    TPS65988 GPIO does not have any configurability until the configuration is loaded from the SPI flash. What kind of behavior is needed to drive the WP? Is it possible to use a different pin such as LDO_3V3? 

    Thanks and Regards,

    Raymond Lin

  • Hi Raymond, thank you for your answer, that's very clear to me now. Finally I will drive the \WP pin with a pull-up resistor to LDO_3V3 and will use a MOSFET to pull the pin down to GND when my system is ON.