TPS7A37: The LDO output increases while increase in load

Part Number: TPS7A37

Tool/software:

The LDO can hold upto 1A of load but we use 100 mA and taking 1.25V and input of 3.3V .Increasing the slight load creating the voltage increase to 0.5V for each time.

What will be the potential cause for this increase in voltage for the load change.

  • Hello Aishwarya,

    Can you please share a waveform of your load current and output voltage?

    What is the magnitude of the load step when you observe the output voltage increasing by 500mV?

    Regards,

    Daniel

  • Sno Current Load Voltage change Step change
    1 0 1.25
    2 0.001 1.38 0.13
    3 0.002 1.75 0.37
    4 0.003 2.02 0.27
    5 0.004 2.21 0.19
    6 0.006 2.38 0.17
  • Hello Aishwarya,

    It seems like the device is out of regulation, possibly oscillating.

    Can you please also share a high resolution image of your schematic?

    What are the input and output capacitor values?

    Regards,

    Daniel

  • Input capacitance 4.7uF (2Nos) .

    Output has 2 capacitors

    1. Output to Feedback (10nF) &

    2. 22nF to ground

  • Please provide the solution for the issue

  • Hello Aishwarya,

    Can you please also share a copy of your schematic and if possible the layout where the regulator is, showing the input and output capacitors?

    Regards,

    Daniel

  • Thats not possible But I have provided the values of capcitors .Please provide the possible reason for the issue and optimal solution

  • Hello Aishwarya,

    The TPS7A37 requires a 1-µF output capacitor for stability. It is designed to be stable for all available types and values of capacitors. In applications where multiple low ESR capacitors are in parallel, ringing may occur when COUT × ESR < 50 nΩ-F. Total ESR includes all parasitic resistances, including capacitor ESR and board, socket, and solder joint resistance. In most applications, the sum of capacitor ESR and trace resistance will meet this requirement.

    It is also important to note that the output capacitor must be placed on the same plane as the regulator and as close to the output as possible, as shown in section 8.2.1 from the datasheet (appended at the bottom for your convenience).

    Not having a waveform of the load and output voltage, as previously requested, makes it very difficult to diagnose. 

    What is the nature of your load (resistive, capacitive, inductive, mixed)?

    Do you see any ringing on the output?

    Is your input voltage regulated DC, rectified AC, other?

    What are the values of the feedback resistors?

    Can you try removing the 10nF CFF capacitor?

    Regards,

    Daniel

  • What is the nature of your load (resistive, capacitive, inductive, mixed)? differential OPAMP

    Do you see any ringing on the output? output is stable

    Is your input voltage regulated DC, rectified AC, other? Yes from 3.3V buck convertor

    What are the values of the feedback resistors? 19.6k and 523k

    Can you try removing the 10nF CFF capacitor? can I know the reason.

    Does the LDO sink the current returing ?

    Below are the current measured across the 10k ohm resistor LDO  output-->10K-->opamp

    Does the current sinking could be a possbile issue?

    Current at resistor 10kohm
    0.000072
    0.000067
    0.000042
    0.000027
    0.000016
    5E-06
  • Hello Aishwarya,

    I don't have the full picture of your circuit, but now that you mention the use of an opamp, this sounds more of a stability problem.

    When you say the output is stable, are you using an oscilloscope to monitor the output, or just a dc voltmeter?

    LDOs are not designed to sink any current as it may cause permanent damage.

    Is the LDO being used to supply the opamp's voltage?

    I still cannot decipher your circuit. Is the 10Kohm connected to the inverting input of the amplifier? Try a 50ohm termination from the LDO's output to ground. 

    Can you at least show a partial schematic with the output of the LDO and the load?

    Removing the CFF capacitor will increase the speed of the loop. Having the CFF capacitor will provide a stable supply, but if there are any transients and there is an interaction between the opamp and the LDO, you will see an oscillation.

    Regards,

    Daniel

  • Please have a lo   LDO issue.pdfok into the file 

  • The inverting terminal of the opamp has the DAC input ,Simlarly we have 6 opamp .

    At DAC input =0 LDO =1.25 V

    When more than one DAC is triggered when encounter issue in increase of LDO voltgae .

    I have included the voltage values and schematics for referance.