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BQ78350-R1A: SMBus signal form without pull-ups

Part Number: BQ78350-R1A


Tool/software:

Hi team,

I am seeing unreliable SMBus communication with the BQ78350-R1A. The bus lines lack external pull-up resistors in my design, and the oscilloscope captures show significant signal degradation.

Specifically, I'm observing a very slow rise time on the clock and data lines, and the logic high levels are borderline.

Is this signal shape expected without external pull-ups, ? What are the implications for long-term reliability?

My design doesn't include external pull-ups as per some reference schematics. Is this a common practice?

SMBD:

SMBC:

Thank you for your insight.

Ahmed.

  • Hello,

    This question has been assigned and will be followed up when possible.

    Thank you,
    Alan

  • The bus requires external pull-ups. The smbus IO is open drain, meaning the internal structure has one FET that can drive the pin to GND but not to a logic high level. Therefore you will have to use external pull-up resistors on SCL and SDA to generate the logic high level. If these do not exist then the logic high level cannot be generated. There must be some pull-up in your design because otherwise there would be no rising edge. The rising edge in your screenshots indicate that the resistance of the pull-ups is too high for the total bus capacitance. Typical pull-up values for fast smbus clocks are around 2.2kOhm.