Tool/software:
I am planning to use the TPSI2140-Q1 IC in my new design. My ADC shares the same reference as the battery negative. I referred to the Battery V– Reference Architecture shown in the TPSI2140-Q1 datasheet, and I would like to use a similar approach for battery voltage measurement in my system.
However, the issue is that if the isolation resistance fails, the measured battery voltage becomes incorrect, which is not acceptable. To address this, I am considering moving SW2 behind R3 so that even if the isolation resistance fails, the battery voltage measurement remains accurate.
Additionally, I plan to measure other battery parameters after SW1. Would this approach be acceptable, or do you recommend an alternative solution?