TPSI3052-Q1: Design application driving a pair in 3-wire mode

Genius 17625 points
Part Number: TPSI3052-Q1

Tool/software:

Hi Experts,

We'd like to confirm if the design below is applicable:

In our application, we are using four TPSI3052QDWZRQ1 devices, one on each gate, to drive gates G1 through G4 on the Littelfuse MMIX4B22N300 H-Bridge. In our application, we drive gates 1-4 and gates 2-3, as pairs.

Question:
Is there anything incorrect about driving a pair of TPSI3052s configured in three-wire mode, with one MCU GPIO?

According to the datasheet, the EN pin acts as a digital Input configured in a 3-wire mode, and I didn’t see any current consumption of the EN pin when using it in 3-wire mode.

This seems straightforward, but customer wanted TI experts official opinion.

Regards,
Archie A.

  • Hello Archie,

    Thanks for reaching out to our team on E2E.

    I am unsure how much shoot-through would be acceptable in your application. Based on the TPSI305x EN to VDRV delay, there could be up to microseconds of mismatch between separate TPSI305x devices.

    I am guessing a dual output isolated gate driver like UCC21550-Q1 designed for half-bridge applications would be a better fit since it only has nanoseconds order of timing mismatch.

    Best regards, 
    Tilden Chen


    Solid State Relays | Applications Engineer

  • Relocating this thread to high power drivers team and assigning the thread to one of their applications engineers.

  • Hi Tilden,

    Thank you for your redirection.

    Looking forward hearing an update from HVP department.

    73,
    Archie A.