Other Parts Discussed in Thread: LM74800-Q1,
Tool/software:
Hi team,
My customer uses the LM74700-Q1 and LM74800-Q1 in one project, where the MOS controlled by the LM74700-Q1 is a normal power line (KL30_2) and the back-to-back MOS controlled by the LM74800-Q1 is backup power (KL30_3).
During normal use, the KL30_3 power supply needs to be internally switched off, so the MOS controlled by the LM74800-Q1 needs to be powered off.
The customer's concern now is that the PVDD2 has a constant voltage during the actual test, even in the sleep case and the sleep current is tested to 470uA. It was determined that the leakage current generated by the LM74800-Q1.The path of the leakage current is shown below, from PVDD2 to the OUT pin of LM74800-Q1. The customer attempts to disconnect the OUT pin of the LM74800 and the sleep current drops from 470uA to 4uA. (These tests are based on the LM74700 and LM74800 without enabling)
The customer cannot accept a sleep current of 470uA, but the OUT pin must be connected to PVDD2 and cannot be disconnected.
The customer wants to know what is causing this problem? How to solve this issue?
Could you help share your suggestions? Thanks.
Regards,
Ivy
