CSD19538Q3A: when using this MOSFET in current limiting application

Part Number: CSD19538Q3A

Tool/software:

Hi,

I have a question regarding the use of this MOSFET in a current-limiting application:

  1. Under normal conditions, when the current is below the limit threshold, the MOSFET should operate in the linear (or constant resistance) region, with the gate voltage adjusting according to the drain current. If I am sensing the drain current, how can I set the gate voltage correctly to keep the MOSFET in the linear region while minimizing power dissipation?

  2. When the current reaches the threshold and I want to limit it to a constant value for a predetermined time, the MOSFET should enter saturation. How can I adjust the gate voltage to ensure the MOSFET operates in saturation in this case?

Best regards,
Mohamed

  • Hello Mohamed,

    Thanks for your interest in TI FETs. Let's make sure we are in agreement on terminology as detailed below. In the linear region, the FET is on (enhanced) and on resistance is constant for a given value of Vgs. In the saturation region, the FET operates in linear mode with voltage across it and current thru it. For the CSD19538Q3A, as long as Vgs ≥ 6V, the on resistance is constant and is less than the maximum specified in the datasheet. There is no need to adjust Vgs although increasing it (up to 10V) reduces the on resistance and conduction (I²R) loss. As shown in the Rds(on) vs. Vgs graph on page 1 of the datasheet, when Vgs < 6V, Rds(on) increases exponentially. When Vgs > 10V, Rds(on) is relatively flat.

    To regulate the current when it exceeds the threshold, you would need a closed loop feedback system to sense the current, compare it to a reference and adjust Vgs to achieve constant current. This requires additional external circuitry. You might also consider using a high side switch controller or hot swap controller which typically includes features to limit the current during inrush when the FET turns and overcurrent protection. I hope this helps. Let me know if you have any additional questions.

    • LInear region: Vds << Vgs - Vth
    • Saturation region: Vds > Vgs - Vth

    Best Regards,

    John Wallace

    TI FET Applications