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UCC28703: Reference design 24V / 3A Output using Wurth 750343068 Transformer

Muhlis Aslan
Prodigy 10 points

Part Number: UCC28703

Tool/software:

Hello TI Experts,

I am currently working on a power supply design using the UCC28703 flyback controller, with the goal of achieving a regulated 24 VDC / 3 A output from a 220 VAC input.

For the magnetic component, I selected the Würth 750343068 SMPS transformer. I carefully followed the design procedure and calculations provided in the TI Excel tool, and then implemented the circuit accordingly.

However, I am encountering the following issues:

  1. Continuous Reset Cycling
    The UCC28703 does not start up correctly and instead continuously enters a reset cycle.

  2. Output Regulation Problems
    Even in cases where the UVLO does not trigger, I am still unable to achieve a stable output voltage and current.

Additionally, I physically built both the WEBENCH design and the design example from SLUC408B. Unfortunately, the circuit did not operate, and the MOSFET was damaged during testing, despite following the schematic and calculations exactly.

Since this attempt failed, I also tried building another SMPS design by reverse-engineering an existing working supply, but this design also did not function properly. At this point, I am unable to identify where my mistake lies.

I am sharing below the WEBENCH design file and the Excel design tool file for your reference.

Reference Files

Schematics

(Here I will attach my schematic diagrams and transformer connections for reference)


I would greatly appreciate any guidance on:

  • Possible reasons for continuous reset cycling of the UCC28703.

  • Why I cannot achieve stable output even when UVLO is not active.

  • Key design considerations I may be missing regarding startup, OVP/UVLO thresholds, or feedback loop stability.

Thank you very much in advance for your kind support and assistance.

Best regards,
Muhlis Aslan

  • 0
    Prodigy 10 points

    The webench design link that I forgot to add : https://webench.ti.com/power-designer/switching-regulator/customize/52

  • 0 in reply to Muhlis Aslan
    TI__Intellectual 1080 points

    Hi Muhlis,

    Can you mention your test condition, I mean , what is input voltage  your applying, what is the load you are applying? for following  things to occur

    1. Continuous Reset Cycling
      The UCC28703 does not start up correctly and instead continuously enters a reset cycle.

    2. Output Regulation Problems
      Even in cases where the UVLO does not trigger, I am still unable to achieve a stable output voltage and current.

    Regards

    Dushyanth SR

  • 0 in reply to Dushyanth R
    Prodigy 10 points

    Hello Dushyanth R,

    First of all, thank you for taking the time to look into my issue.

    After my latest adjustments, I was able to set the output voltage to 24VDC without entering the UVLO fault loop. I rebuilt the circuit and I’m sharing the schematic I currently use below — I will continue working based on this version. Instead of the circuit I reverse engineered, I proceed with the circuit in the webench design.

    Test conditions:


    Input: 220VAC / 50Hz
    At 100mA load, the output drops from 24VDC to 21VDC.
    When I increase the load, for example 150mA → 17VDC, 200mA → 3.5VDC, the voltage drops sharply, or resetting
    I cannot obtain a stable output current.

    I also tried several Rcs resistor combinations, but in those cases the output voltage changes as well.

    Thank you again for your support,
    Muhlis Aslan

  • 0 in reply to Muhlis Aslan
    TI__Intellectual 1080 points

    Hi Muhlis ,

    Can you share the  current sense resistor waveform when you increase the load? Can you check is it hitting VCsmax

    Regards

    Dushyanth

  • 0 in reply to Dushyanth R
    Prodigy 10 points

    Hello Dushyanth R,

    I would like to inform you that I’ve achieved mostly correct results using the calculations provided in the documentation and the design tools. I’m now able to obtain the desired voltage and current levels, and I believe with a few small adjustments, I can fine-tune them further.

    At this stage, I’ve partially figured out how to move forward with UCC28703.
    However, my current problem is maintaining a stable output voltage under load and minimizing or eliminating the transformer’s audible ringing/chirping.

    Any guidance on improving load regulation and reducing transformer acoustic noise (possibly related to switching frequency or control loop behavior) would be highly appreciated.

    Regards,
    Muhlis

  • 0 in reply to Muhlis Aslan
    TI__Intellectual 1080 points

    Hello Muhlis,

    Put as capacitance of 100pF across the VS pin.

    Regards

    Dushyanth SR

  • 0 in reply to Dushyanth R
    Prodigy 10 points

    Message:
    Hello Dushyanth R,

    I’ve VS pin 47 pF and 100 pF capacitors on the auxiliary side , but when either is connected, the output voltage rises suddenly, and the snubber diodes get very hot.
    When I leave this capacitor unconnected, I can still hear audible ringing/chirping from the transformer.

    My load is 3A, and I’ve calculated the CS resistors for a 4A current limit.
    At this point, I need to achieve both CC/CV operation with stable behavior under load, without excessive switching noise or snubber stress.

    Snubber diodes: 1.5SMC200A, ER3J

    Could you please help me identify what could be causing the voltage overshoot and diode heating when the small capacitor is added, and how I might optimize the design for stable CC/CV performance with minimal audible noise?

    Thank you for your time and guidance.

    Regards,
    Muhlis

  • 0 in reply to Muhlis Aslan
    TI__Intellectual 1080 points

    Hi Muhlis,

     Remove the cap across Vs and  can you share me the waveform of the current sense voltage when you start loading the converter?

    Regards

    Dushyanth SR

  • 0 in reply to Dushyanth R
    Prodigy 10 points

    Hello Dushyanth R,

    CH1 shows the waveform of the line going from Aux to VS pin, measured under a 1A load condition. I believe there is some noticeable noise on this signal.

    CH2 displays the DRV PWM waveform captured at the same time.

    When I connect a 1 pF ceramic capacitor to the VS pin, the voltage rises significantly, as I mentioned in my previous post.

    I would appreciate your recommendations on how to make this signal cleaner and more stable.

    The oscilloscope image is below,


    Best regards,
    Muhlis

  • 0 in reply to Muhlis Aslan
    TI__Intellectual 1080 points

    Hello Muhlis,

    Can you point me in scope shot , where is noise you are observing?.

    Regards

    Dushyanth SR