• State TI Thinks Resolved
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 98 views
  • Users 0 members are here
Support feedback
Options
Options
Related

LSF0108: Is a pull-up really necessary when down translating with leakeage at output

michel GUENEGO
Prodigy 65 points
Part Number: LSF0108
Other Parts Discussed in Thread: LSF-EVM

Tool/software:

After having watched to the LSF family video "Down Translation with the LSF Family"

https://www.ti.com/video/series/understanding-the-lsf-family-of-bidirectional--multi-voltage-lev.html

At 2'30 it is said :

"If the leakage current into the receiver is less than 1 microamp, then the resistor RA1 can also be removed."

I don't understand why we couldn't remove the pull-up resistor when there are some significant leakage, or even big leakage. 

My basic reasoning is that the mosfet is bidirectional, so the Drain and Source can be swapped. If ever, because of leakage at A side, (and no pull-up RA1) the voltage would decrease, the MOSFET will conduct, the Source being on A side and Drain on B side. So the voltage cannot not colapse on A side, even with significant leakage, and RA1 is not needed even if there are significant leakage. 

I do a test on LSF-EVM with VrefB=5V, VrefA=3.30V, on side B a 1 level (5V) and no pull-up on side A

If I measure the output A with my multimeter Fluke 87V (10Mohm impedance), I measured 3.49V... so a bit higher than the expected 3.3V. 

If I put a 10kohms pull DOWN on A side, creating a 330uA !! leakage, I measure 3.19V, which is still a good 1 level.

If I put a 10kohms pull UP on A side (and no pull-down, no leakage), I measure 3.37V, a bit higher than 3.3V

So there is a leakage from B side to A side which is attenuated by the pull-up or the pull-down. (same kind of leakage than we can see on VrefA pin)

At the end, I would think that the advice to keep the A pull-up when there are some leakage and to remove it when they are no leakage is just the inverse of what should be done, isn't it ? :-)

I would likely change the advice to "If the leakage current into the receiver is less than 1 microamp, then keep the RA1 resistor or add a pull-down to increase leakage." In that way, the voltage on A side will not go too much about VrefA. A 100kohms pull-down is perfect is the above case.

Am I right ? 

  • 0
    TI__Guru 50768 points

    Hi Michel,

    I am working on a response. I will get back to you shortly. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    TI__Guru 50768 points

    Hi Michel,

    michel GUENEGO said:
    I do a test on LSF-EVM with VrefB=5V, VrefA=3.30V, on side B a 1 level (5V) and no pull-up on side A

    I assume you have the LSF-EVM setup similar to the video where B1 is pulled HIGH by a driver.

    VREFB = 5V

    VREFA = 3.3V

    LSF-EVM setup in level translation mode where EN and VREFB are shorted through a 200k. 

    No pull-up resistors on A-side. 

    If the EVM is setup in level translation mode, your VBias = VREFA + VTH = 3.30V + 0.6 V = ~3.9 V. 

    So your A-side voltage is ~ 3.30V as long as leakage is a minimum on A-side. This is because the channel FET starts to turn off for voltages > 3.3 V at A1, this makes sense because the gate voltage of the channel FET is VBias = ~3.9 V. VTH > VGS, and the FET starts to turn off. This is classic down translation example. 

    Adding a PU resistor to A-side should keep the voltage on A-side closer to the VA = 3.3 V supply. 

    Adding a PU down resistor to A-side should lower the voltage on A-side, but no by much since a push-pull driver on B-side is able to source a significant amount of current. 

    The PU resistor RA1 looks to be most important in cases where your B1 transmitter is of the open-drain kind - can only drive LOW and must use a PU resistor on B-side to reach VB = 5 V. If there is significant leakage into the receiver and a weak- PU resistor on B1, then I suspect the voltage would drop on A1 potentially to a level where it is outside a VIH to the receiver. 

    Please let me know if I am answering your question, or completely missing the point. I might be able to loop in the maker of that video to help explain his thought process when creating that LSF down translation diagram. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    Prodigy 65 points

    Hi Tyler,

    Thanks for your explanations.

    My question was about the TI explanation in the video. 

    I don't understand why it is said "If the leakage current into the receiver is less than 1 microamp, then the resistor RA1 can also be removed." at about 2'30.

    Could you explain me why the leakage is important in this case ? Because it doesn't seem to match the reality and you seem to confirm the measure and theory I wrote?

    Maybe the leakage condition should be removed from this video sequence, because it triggers some confusion in me (and probably for others too). All the 8 !!! videos clearly explain the LSF translator for me, except this sequence...

    And sometimes, just one problem may cast suspicion on the whole. Did I miss something ?

    That why I bought an LSF-EVM to make the test and confirm the way I understand how it really work. 

    Best Regards,

    Michel

     

  • 0 in reply to michel GUENEGO
    TI__Guru 50768 points

    Hi Michel,

    I will get back with you soon. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    TI__Guru 50768 points

    Hi Michel,

    The basic understanding of only say < 1uA in the video is because TI cannot guarantee every condition based off PVT - process, voltage, temperature range. Since LSF is a transistor based solution, the device can vary significantly with PVT, and thus we have to be conservative in the current metrics we explain in the videos. While you may see this as an inaccuracy, we see it as a safe guard from a datasheet perspective. 

    Regards,

    Tyler