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Original question:

TPS650365-Q1: TPS65036

TPS650360-Q1: How to reduce the risk if the IIC communicate normally

Jack Li
Intellectual 2660 points
Part Number: TPS650360-Q1
Other Parts Discussed in Thread: TPS650366-Q1

Hi Expert,

My customer is evaluating TPS650366-Q1 to power F29, here is two questions, please help with them.

  1. They need to wake up the PMIC with both of rish/falling edge, but it seems that our device just support GPIO high-voltage to wake up TPS65036-Q1, do you have any methods to realize it?
  2. As for IIC interface, we know they are OD model, they use two F29 GPIO to drive it, they show concerns if F29 GPIO is high output status but PMIC IIC is pulling down, which means that the MOSFET is open and F29 GPIO is shorted, how to deal with it?

 

Best Regards,

Jack

  • 0
    TI__Expert 6696 points

    Hello Jack,

    Is this for VMAX? Which part number or VMAX project is this for?

    1. The TPS65036605RAYRQ1 (the configuration used for VMAX Gen5) uses the SEQ pin to enable all regulators. This is a digital pin that only detects a 'high' digital state. There is no option to configure a rising or falling edge detection.

    2. I2C communication always uses external pull-ups so the pins that use I2C are configured to open-drain. If the MCU GPIO pins are configured to open-drain, then there is no risk of a short to VDD.

    Best regards,
    Jude Stehling

  • 0 in reply to Jude Stehling
    TI__Intellectual 2660 points

    Hi Jude,

    This is for my another customer.

    They have the demanding to wake up the PMIC with  rising or falling edge detection, if TPS65036605RAYRQ1 doesn't support this, we may lose this socket. Do you have any other methods, like adding a logic device.

     

    Best Regards,

    Jack

  • 0 in reply to Jack Li
    TI__Expert 6696 points

    Hello Jack,

    Can you clarify whether the customer wants detection of a rising/falling edge digital or analog signal? Please describe the behavior that the customer has requested as much as you are able to. I think it is very likely that we are able to support their request, I am just not sure what behavior they need based on the information you have provided.

    The TPS65036x-Q1 can turn on or off based on the analog signal at the VSYS/PVIN_B1 pin. The TPS65036x-Q1 can also turn on or off based on the digital signal at the SEQ pin.

    Best regards,
    Jude Stehling

  • 0 in reply to Jude Stehling
    TI__Intellectual 2660 points

    Hi Jude,

    After checking with the customer, there are two PMIC wake-up source request in this system, one is rising edge signal, another one is falling edge signal, both of them need to wake up the PMIC with two separate PIN, thanks.

    Best Regards,

    Jack Li

  • 0 in reply to Jack Li
    TI__Expert 6696 points

    Hello Jack,

    So, the PMIC should have all regulators power on any time that either a rising edge or falling edge signal is detected? What would power off the PMIC? This does not seem like a very well defined requirement.

    This PMIC does not have a sufficiently configurable state machine to allow this sequencing to be implemented. External hardware such as another IC to detect edges and create the "OR" logic to supply the TPS65036x-Q1 SEQ pin would be required; a PMIC with a programmable FSM might also work for this scenario, but I do not know their limitations entirely.

    Best regards,
    Jude Stehling

  • 0 in reply to Jude Stehling
    TI__Intellectual 2660 points
    Jude Stehling said:
    What would power off the PMIC?

    Hi Jude,

    They will make PMIC go to sleep by software.

    Best Regards,

    Jack Li

  • 0 in reply to Jack Li
    TI__Expert 6696 points

    Hello Jack,

    Understood. Please see the above response regarding the potential ways to address this request. External hardware is most likely necessary.

    Best regards,
    Jude Stehling