Other Parts Discussed in Thread: LP8764-Q1, DRA821, TPS6594-Q1
in Use's Guide: Powering DRA821 with TPS6594-Q1 and LP8764-Q1
GPIO5 of LP8764-Q1 at table 5-7, says input, but actaul EVM/reference design GPIO5 is used to enable LDO for VPP_EFUSE_1V8 as an output, is this described correctly in doument? or actul config in NVM wrong?
We need to make GPIO5 as an output? can you help to make the change for next part delivery?