Original question:
TPS65994AD: Host Interface register/command spec for TPS65994x
I put in a resource request over a week ago and have not been granted access. I need the USBCPD Application Customization Tool for TPS65994AD to generate a new .bin file. The current configuration on our device is causing an issue at startup that we are hoping can be resolve by adjusting the configuration to use the SRDY feature to keep the mosfets turned off during startup.
We are using this on a custom motherboard to connect to and power a 10.5inch USBC screen. The current issue that we are having is that the 5V is back feeding onto the 20V rail and the 24V rail. This is because the 5V rail comes up much earlier than the 24V rail which powers the 20V. I would like to try to use the SRDY feature so we can control the back to back mosfets and enable them using I2C once all of the voltage rails are up. We have tried sink and source modes and that did not resolve the issue. I have been given .bin files from the motherboard manufacturer but that is a slow process and we would like to seed up the resolution of this issue.
Trying all of the options listed in the GUI tool does not create a valid .bin that works on the PD. When checking the global registry I only receive all 0. I can send you (via email or alternative method) the .bin that we have that puts the PD into source mode if you can modify it for us. Or help us to resolve the issue with the GUI. Also when loading the current .bin to the GUI it states that version of FW is not supported.
This back feed situation happens at every system startup. The customer will notice that the USB powered screen will flicker. I believe this is due to the PD 5V going into overcurrent and resetting. We have tried the PD configured as a sink and a source and the issue still occurs. In our scenario the power is being sourced. We would like to try the bidirectional SRDY setting.
Note they cyan voltaged is mirrored on the 24V and 20V rails. The 20V is enabled by the PD but the power is supplied by the 24V rail which is not up yet.
Sourcing should not cause the external 20V path to open so my guess is the RCP occurred during the power role where the PD switching from source mode to sink mode. Do you have a PD log here?
To set the external power path to wait for SRDY change the PP3/4 configuration to 3h. EC should send the SRDY command after the new contract as consumer interrupt is received
I can create .bin files but I must select one image of the following images to start from. Every time I load the .bin to the EEPROM the PD comes up in PTCH mode. I tried writing 08 47 41 49 44 but registry 03 always reports 04 50 54 43 48. I'm assuming that this is why the global parameters are all zero. I'm also assuming that this is a checksum issue and thus the PD stays in PTCH even after power cycles. The only way to get things to work again is to load the original .bin I was given. Is there a way to email you the original .bin so that you can modify if for me?
