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BQ76PL536 communications

Other Parts Discussed in Thread: BQ76PL536, BQ76PL536EVM-3

I am working with a battery balancing board with 4 stacked BQ76PL536's. The board is a custom design and was made by another engineer some years ago and then put in storage...

I have very little idea about how he built the circuitry and have seen conflicting schematics. I have managed to locate the SDI, SDO, CS and CLK on the bottom chip and have wired them to a QuickUSB dongle to connect to my PC.

I have powered the bottom chip with alkalines for testing purposes, >20 volts (pack of 6 'cells', approx 3.6 volts per 'cell') but am not able to establish communications. 

All I want to be able to do at this point is read the voltage data off the device (just the bottom chip) and verify that it is operational.

I am using the diagnostic GUI provided by QuickUSB to perform all communications. The software has an SPI read write feature, but I am not being able to read any data off the device. It only returns zeros when I hit the read buttons. 

I am using Port E bits on the QuickUSB dongle and have not implemented slave selects. I assume that all the chips in the stack (once they are brought online) will transmit data through the bottom chip off through the single output.

Please assume you are making a 'for dummies' guide when answering... I have no background in electronics... What I want to know is

1] Whether I need to write some kind of command to the chip before I read off it (since I am only talking to one chip) 

2] If so, how would I get started and what are the hex strings which I would need to write to read the voltage data off that one chip.

Any help is greatly appreciated.

Also, after clearing this step I will need help with setting the addresses for the other chips in the stack and reading data from them as well.

  •  Hi Surya,

    Goto this link and you will find the BQ76PL536EVM-3 software. This TI GUI to run PL536. It can be used with custom board as long as SPI(CS, SCLK, SDO and SDI) pins are connected properly.

    You will also find the user's guide and you can get some idea.

    http://www.ti.com/product/bq76pl536

    1. Make sure HSEL pin is connected GND.

    2. Check voltage of LDOD1, LDOD2, REG50 and LDOA with a meter. Make sure they are reading 5V. I just want to make sure ICs are okay since the board hasn;t been used for few years.

    To answer your questions.

    1. Yes, you must have proper device address for you to communicate properly.

    2. You have two options for now.

     a.  If you using TI GUI then it will take care for you. Read the user's guide.

    b. If you are using your own software then you need to follow "simple address discovery and assignment algorithm" from the datasheet.

     

     

     

  • HSEL is grounded.

    LDOD1, LDOD2, REG 50 and LDOA are confirmed to be reading 5V when the device is powered. 

    For addressing the chip (only the bottom chip is powered and connected to the host interface), I am transmitting the following hex strings from the QuickUSB diagnostic software tool

    For Reset: 0x3F 0x3C 0xA5 0x07

    I receive a return of 0x00 0x00 0x00 0x00 from the reset command when I hit writeread

    To Set Address to '01': 0x01 0x3B 0x01 0x02

    Similar to the reset command I receive a return of 0x00 0x00 0x00 0x00 from the addressing command when I hit writeread

    I am not certain whether those returns even mean anything, but have included them for completeness.

    Using the scope I have captured and verified the messages exiting the QuickUSB interface device and reaching the SDI pin on the BQ76PL536

    However, when I try to read any of the registers I get only failed communications (CRC checks failed). Even if the CRC check is ignored, the information read does not appear to be valid. 

    I am computing CRC's using a web based tool which is based on the same algorithm as presented in the communications guide (Link: http://smbus.org/faq/crc8Applet.htm)

    I am not sure whether this (the failed communications) is a result of my 'manual' approach where I type in the messages and operate the writeread feature myself (on the QuickUSB interface software) rather than using a code.

    With regards to the EVM software provided by TI, I had been planning on using it earlier, but I have run into the following issues (as I had mentioned in the case I filed over the phone).

    The TI provided EVM Software keeps returning an error of "SPI bus not found" 

     Also, while starting up I get an error saying that access to an error.txt file is being denied and I need to run the program as an admin. After this, I get a "no devices found" error and when the GUI pops up, I can see the "SPI bus not found" and "No Response" error messages on the bottom status bar.

    Also, I wanted to confirm that the following settings for SPI communications are enabled on the QuickUSB interface module

    CPOL = 0 (i.e. Normal Clock enabled)

    CPHA = 1 (i.e. Clock then Sample enabled)

    Little/Big Endian = 1 (i.e. MSbit to LSbit enabled) 

    Please advise. 

  • Your commands looks right.

    you still don't have good communication to the IC.

    Have you review SPI host interface timing in the datasheet?

    Do this for me.

    Connect your cells and Ardvark to your board then reopen TI GUI.

    I am going to have someone to contact you and send your schematic to me. I'd like to review it.

    It would help me if you can send me few pictures of your set-up.

    You probably saw our set-up in the user's guide.

     

     

  • I am not using the Aardvark interface. I am currently using a different interface device called QuickUSB (mfr. Bitwise Systems, product page: http://www.bitwisesys.com/product-p/qusb2.htm)  to provide my USB  based SPI capability.  Is this part of the problem?

    I had seen the EVM-3 setup in the TI documentation, and I believe our battery rigs are functionally similar. 

    I also saw the numerous references to the Aardvark device in the TI documentation, but the QuickUSB device I am currently using had apparently been selected by the same engineer who had designed the board. I had assumed it offers the same level of functionality and compatibility.

    Also, while reading the datasheet, I saw this

    "Designer Note: North (_N) pins of the top, most-positive device in the stack should be connected to the BAT1(2) pins of the device for correct operation of the string. South (_S) pins of the lowest, most-negative device in the stack should be connected to VSS of the device. The connections may direct, or via a pullup resistor (_N) or pulldown resistor (_S) in the range of 100 Ω–1 MΩ."

    Now the south pins on my bottom device are connected to the most negative terminal of the test battery rig via 100 ohm resistors, but the north pins are connected to the south pins  of the next higher BQ7PL536 (which is not being powered). This connection scheme is carried on until the 4th device which will have its north pins connected to the most positive battery terminal (when all devices are powered). However, as of now, there is no such connection. Could this be the source of my problems? 

    I am not authorized to release schematics or pictures outside the company at this time, but please provide me with an appropriate method of conveying it to you via email or ftp (whichever you prefer). I will confer with my superiors and see if it is possible.

  • Additionally, I notice that the chip tends to heat up noticeably when powered up. I do not have a reliable temperature probe, but I estimate it to be upwards of 120F. Is this normal behavior?

  • You are shorting pins. IC shouln't heat up like that.  You need to make sure your pins are not shorted.

    100R resistor won't make a difference in your case.

    Goto TI website and check for user's guide.

    I sent you email to you with my email address. You can send your schematic to me directly.

     

  • In reference to the annotated schematic you sent me, I wanted to know exactly why the C356 capacitor will damage the IC. I have not gotten a hold of the design engineer at this point, but I think my assumption of secondary communications and control protocols might be valid (for the section off to the right hand side of the chips).