• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 64 subscribers
  • Views 193 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A20: TPS7A2030PDBVR issue with ESD

Yan Pui Chan
Intellectual 520 points

Part Number: TPS7A20

Hi,

I have an application that uses the TPS7A2030PDBVR and is experiencing issues during ESD testing. The symptom occurs after a direct-contact ±4 kV ESD event: the LDO output drops to 0 V while the EN pin remains held high. After a power cycle (driving the EN pin low and then high again), the device recovers and operates normally.

We tested the same setup using a pin-to-pin compatible LDO, TLV70230DBVR, and it does not exhibit this ESD issue. However, we would prefer to use the TPS7A2030PDBVR due to its significantly lower quiescent current (Iq).

In our circuit design, we have the following capacitors:

  • At the LDO input (VBAT = 3.3 V to 4.2 V): 10 µF and 0.1 µF placed close to the LDO

  • At the LDO output (3.0 V): 1 µF and 0.1 µF placed close to the LDO

  • Additional bulk capacitance located further away: approximately 100 µF on the LDO input line and 20 µF on the LDO output line

 

Please advise if there is any explanation and recommendation regarding this issue.