• State
  • Replies 6 replies
  • Subscribers 62 subscribers
  • Views 80 views
  • Users 0 members are here
Support feedback
Options
Options
Related

LMG342X-BB-EVM: Slight bounce on reference current at 1MHz operation

Carolus Andrews
Mastermind 24265 points

Part Number: LMG342X-BB-EVM

Hi all, 

I have been desigining a bidirectional test system based off of the listed motherboard and its associated LMG3422 daughter card, and am starting to push into higher frequency, higher voltage switching. I'm using the device in a very unorthodox manner, in that I am not designing the ILpp to any metric that makes sense, but rather using the resonating current in the inductor as a test platform with current sensing devices in line on either side of the inductor. 

I'll list test conditions below, and I'm sure there will be some questions that need to be answered on changes to help dial this in, but effectively here is the crux of the issue:

image.png

The green waveform here is the DUT output I am testing (which has a lot of package parasitics, so disregard this one for now), but the blue waveform is my reference current captured via a Hioki 3274. I would expect the waveform to be relatively triangular, but as you can see, I am getting a small dip in each direction as the FETs close/open

Test Conditions:

Vin: 100V, D: 0.5, VO: 50V, I_LOAD: 0A, ILpp: ~10A, L: 1.25uH, fsw: 1MHz, Cout: ~600uF via a 560uF bulk electrolytic, and several ceramics to optimize ESR, Cin: ~60uF via 2x HV film cap and ceramics

My current running theory is input impedance is the cuprit. I am interfacing the input via 1m long cables, which I am assuming would add a non-trivial amount of input impedance and possibly affect the waveshape, but I wanted to see if the team has run into this form of distortion and how it might be cleaned up, as the goal here is try and use the device as a form of "noisy trianglular waveform generator" to examine current sensing full scale ranges in a noisy environment. 

  • 0
    TI__Intellectual 930 points

    Hi Carolus,

    Can you please share SW waveform measurement in screen capture with the current measurement?

    Thanks & Regards,

    Ruchika

  • 0 in reply to Ruchika Sinha
    TI__Mastermind 24265 points

    Ruchika, 

    Thanks for the response. I went back down and grabbed the requested shot.

    There is definitely an anomaly present in the switch node where the node rings at a different voltage level for a period of about 100ns (oddly enough, about the time I have the dead time set to. Any advice on this?

  • 0 in reply to Carolus Andrews
    TI__Intellectual 930 points

    Hi Carolus,

    The switch node waveform looks clean. The different voltage level at switch node for a period of 100ns is due to the body diode conducting during dead time as both FETs are soft- switched at no load.

    Could you also please share the Vout waveform? We need to see the voltage across the inductor to analyze the inductor slope and check for any output ripple.

    Thanks & Regards,

    Ruchika

  • 0 in reply to Ruchika Sinha
    TI__Mastermind 24265 points

    Ruchika, 

    I was able to get the requested shot below. Output Voltage is captured beyond the bulk cap (green), I don't know if that matters...

    I also grabbed the input waveform while I was at it, shown below in yellow:

    I then started moving the switching frequency down, and it does seem like the anomaly is fixed to the dead time:

    500kHz:

    200kHz (output is becoming more triangular at lower frequency):

    200kHz with VSW (Yelllow):

    So it seems like the anomaly has been there most of the time, its just that at the slower frequencies it is negligible in terms of proportion to the ON/OFF time (I am testing at a fixed D of 0.5), and becomes more proportional as fsw increases. In my head, it seems like for the dead time with the differing voltage, you are getting a different slope of di/dt across the inductor, which then corrects to the lower slope of V/L as the voltage corrects. Is this expected for the dead time?

    Also, just so you have as much info as I can provide, I wanted to share I have made modifications to the EVM, and the switch node here is larger as a result. I realized after boards were made I should have kept this small and wrapped the DC bus around the board, bringing the probe in on the long side. I will remedy this on the next revision:

     

  • 0 in reply to Carolus Andrews
    TI__Mastermind 24265 points

    Ruchika, any thoughts on the above?

  • 0 in reply to Carolus Andrews
    TI__Intellectual 930 points

    Hi Carolus,

    The inductor slope depends on the voltage across it, so if SW and Vout are clean and unchanged, there should ideally be no variation in the inductor current slope.

    To better understand the observed behavior, could you share the block diagram or measurement setup used for sensing the inductor current?

    Thanks & Regards,

    Ruchika