Part Number: TPS6594-Q1
I try to write my own programming solution, and use the Scalable PMIC NVM Update Guide (slvaf93a.pdf) as a guideline, and i want to know if I understood it correctly.
After the setup of all registers, but before the store to NVM the CRC are from page 0 0xF0 - 0xFB is cleared, and then the CRC BIST will update the values for everything except Page 0 and Page 4.
For page 0 and page 4 the CRC has to be calculated by me, with the help of the code in chaper 5.5 Updating the Register CRC. According to table 5-4 User Registers (Page 0 and Page 4) Register CRC registers I have to write the CRC16 including Persist to 0xf0 and 0xf1, and the CRC16 exclude Persist to 0xf2-0xf3, but there is no Entry where I have to safe the CRC for Page 4, and also no indication that the CRC will be calculated over Page 0 and page 4 at the same time.
The example code has the following signature ` var calculate_register_crc = function(registers, regmap_json, include_persist, page) `. I think that `registers` is the readback for the NVM backed registers, regmap_json is the listing that contains the CRC masking to include or exclude PERSIST, include_persist is a boolean to say what CRC type shall be calculated, and page is used to calculate for page 0 or page 4.
Is it correct that I do not need to calculate a CRC for page 4, and add the two NVM backed values from page 4 instead of 0xF4 and 0xF8 for Page 0?
Also, where can i find the regmap_json for this chip, or do i need to type in the ~1000 values from table C-1. Data and Masks for User Registers CRC calculation?